From patchwork Tue May 3 19:13:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bob Beckett X-Patchwork-Id: 12836090 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AB27AC433F5 for ; Tue, 3 May 2022 19:13:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9CC2F10E7D9; Tue, 3 May 2022 19:13:46 +0000 (UTC) Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by gabe.freedesktop.org (Postfix) with ESMTPS id CC33610E754; Tue, 3 May 2022 19:13:43 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: bbeckett) with ESMTPSA id 5E60C1F44697 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651605222; bh=MwugLBh23dXXE1qsLkpJ+qfy/t4gW1mABUdWdV5evKs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dc0PkMkZWCj0KBoGj/DAsdV/CPLSna0T5TiMp0x8GzaoSEYMBmmEPKJJ2tMf65CUw zr7lybq5exzd6qXWVQcf4dInaC9bNRB0ScdDOm7ylNTJOZijvxVKmTgIWP8Em6Rh8J lBpR8+I9hQMfe7H+O242dh7I3WsnR5UoHd2d4frt1BF+oFC3eCDZgOYQF7fMRFoO3T WLGhogv8KXDGO2xj7cVyGP49glbzbRWVSsNGiqwkGywsga9Kb9T3XRUes9WW3CXq77 jxrvJ7v6hsUq9/i84fV++YhLzBqkmGideSIp/bGB3LQXDW6DXyTvo6DOxBcobcZ/Gx q4YAIUJEvrzyg== From: Robert Beckett To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Daniel Vetter Date: Tue, 3 May 2022 19:13:15 +0000 Message-Id: <20220503191316.1145124-4-bob.beckett@collabora.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220503191316.1145124-1-bob.beckett@collabora.com> References: <20220503191316.1145124-1-bob.beckett@collabora.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/4] drm/i915: allow volatile buffers to use ttm pool allocator X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Thomas_Hellstr=C3=B6m?= , Matthew Auld , linux-kernel@vger.kernel.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" internal buffers should be shmem backed. if a volatile buffer is requested, allow ttm to use the pool allocator to provide volatile pages as backing Signed-off-by: Robert Beckett --- drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c index 4c25d9b2f138..fdb3a1c18cb6 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -309,7 +309,8 @@ static struct ttm_tt *i915_ttm_tt_create(struct ttm_buffer_object *bo, page_flags |= TTM_TT_FLAG_ZERO_ALLOC; caching = i915_ttm_select_tt_caching(obj); - if (i915_gem_object_is_shrinkable(obj) && caching == ttm_cached) { + if (i915_gem_object_is_shrinkable(obj) && caching == ttm_cached && + !i915_gem_object_is_volatile(obj)) { page_flags |= TTM_TT_FLAG_EXTERNAL | TTM_TT_FLAG_EXTERNAL_MAPPABLE; i915_tt->is_shmem = true;