diff mbox series

[v2,1/2] drm/i915/psr: Use full update In case of area calculation fails

Message ID 20220509072404.1423018-2-jouni.hogander@intel.com (mailing list archive)
State New, archived
Headers show
Series Fixes for selective fetch area calculation | expand

Commit Message

Hogander, Jouni May 9, 2022, 7:24 a.m. UTC
Currently we have some corner cases where area calculation fails.  For
these sel fetch area calculation ends up having update area as y1 = 0,
y2 = 4. Instead of these values safer option is full update.

One of such for example is big fb with offset. We don't have usable
offset in psr2_sel_fetch_update. Currently it's open what is the
proper way to fix this corner case. Use full update for now.

v2: Commit message modified

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Tested-by: Mark Pearson <markpearson@lenovo.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Souza, Jose May 9, 2022, 1:32 p.m. UTC | #1
On Mon, 2022-05-09 at 10:24 +0300, Jouni Högander wrote:
> Currently we have some corner cases where area calculation fails.  For
> these sel fetch area calculation ends up having update area as y1 = 0,
> y2 = 4. Instead of these values safer option is full update.
> 
> One of such for example is big fb with offset. We don't have usable
> offset in psr2_sel_fetch_update. Currently it's open what is the
> proper way to fix this corner case. Use full update for now.
> 
> v2: Commit message modified
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Mika Kahola <mika.kahola@intel.com>
> Tested-by: Mark Pearson <markpearson@lenovo.com>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 06db407e2749..8c099d24de86 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1770,6 +1770,9 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
>  		clip_area_update(&pipe_clip, &damaged_area);
>  	}
>  
> +	if (pipe_clip.y1 == -1)
> +		full_update = true;

Left the debug_once and the TODO out, for a regular reader this looks like a normal code path... what is not the case.

> +
>  	if (full_update)
>  		goto skip_sel_fetch_set_loop;
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 06db407e2749..8c099d24de86 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1770,6 +1770,9 @@  int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 		clip_area_update(&pipe_clip, &damaged_area);
 	}
 
+	if (pipe_clip.y1 == -1)
+		full_update = true;
+
 	if (full_update)
 		goto skip_sel_fetch_set_loop;