| Message ID | 20220610074853.3937294-1-arun.r.murthy@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [i-g-t] tests/kms_async_flips: first async flip discarded on i915 | expand |
On 6/10/2022 1:18 PM, Arun R Murthy wrote: > The i915 KMD will use the first async flip to update the watermarks as > per the watermark optimization in DISPLAY13. Hence the actual async flip > will happen from the subsequent flips. > For alternate sync async test, a dummy async flip has to be done to > allow the KMD to perform the watermark related updates before writing to > the surface base address. > > Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Karthik B S <karthik.b.s@intel.com> > --- > tests/kms_async_flips.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c > index 4a0527dc..695aea74 100644 > --- a/tests/kms_async_flips.c > +++ b/tests/kms_async_flips.c > @@ -211,11 +211,14 @@ static void test_async_flip(data_t *data) > * In older platforms (<= Gen10), async address update bit is double buffered. > * So flip timestamp can be verified only from the second flip. > * The first async flip just enables the async address update. > + * In platforms greater than DISPLAY13 the first async flip will be discarded > + * in order to change the watermark levels as per the optimization. Hence the > + * subsequent async flips will actually do the asynchronous flips. > */ > if (is_i915_device(data->drm_fd)) { > uint32_t devid = intel_get_drm_devid(data->drm_fd); > > - if (IS_GEN9(devid) || IS_GEN10(devid)) { > + if (IS_GEN9(devid) || IS_GEN10(devid) || AT_LEAST_GEN(devid, 12)) { > ret = drmModePageFlip(data->drm_fd, data->crtc_id, > data->bufs[frame % 4].fb_id, > flags, data);
diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c index 4a0527dc..695aea74 100644 --- a/tests/kms_async_flips.c +++ b/tests/kms_async_flips.c @@ -211,11 +211,14 @@ static void test_async_flip(data_t *data) * In older platforms (<= Gen10), async address update bit is double buffered. * So flip timestamp can be verified only from the second flip. * The first async flip just enables the async address update. + * In platforms greater than DISPLAY13 the first async flip will be discarded + * in order to change the watermark levels as per the optimization. Hence the + * subsequent async flips will actually do the asynchronous flips. */ if (is_i915_device(data->drm_fd)) { uint32_t devid = intel_get_drm_devid(data->drm_fd); - if (IS_GEN9(devid) || IS_GEN10(devid)) { + if (IS_GEN9(devid) || IS_GEN10(devid) || AT_LEAST_GEN(devid, 12)) { ret = drmModePageFlip(data->drm_fd, data->crtc_id, data->bufs[frame % 4].fb_id, flags, data);
The i915 KMD will use the first async flip to update the watermarks as per the watermark optimization in DISPLAY13. Hence the actual async flip will happen from the subsequent flips. For alternate sync async test, a dummy async flip has to be done to allow the KMD to perform the watermark related updates before writing to the surface base address. Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> --- tests/kms_async_flips.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)