Message ID | 20220720132137.18312-1-anshuman.gupta@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915/dg1: Disable D3 for gfx's VSP | expand |
On Wed, Jul 20, 2022 at 06:51:37PM +0530, Anshuman Gupta wrote: > When DG1 gfx pci endpoint's parent upstream bridge (VSP) enters > to D3, any direct memory read from lmem returns with 0xff. > DG1 requires i915 driven runtime resume in order to read properly > from lmem, DG1 is unable to wakeup from local memory reads. > This may breaks using mmap() with lmem object on DG1 as it > relies on mercy of i915 driven runtime resume. why our disable at root_port not working to block this case? If the root power is not at D3Cold our power shouldn't be cut and our memory should be there. > > Let's not break using mmap() for lmem object on DG1. > Using pci_d3cold_disable(i915) accordingly to disable D3 for > upstream bridge. > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331 > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 6ed5786bcd29..671009fd351a 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -559,6 +559,7 @@ void intel_runtime_pm_enable(struct intel_runtime_pm *rpm) > struct drm_i915_private *i915 = container_of(rpm, > struct drm_i915_private, > runtime_pm); > + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); > struct device *kdev = rpm->kdev; > > /* > @@ -574,6 +575,9 @@ void intel_runtime_pm_enable(struct intel_runtime_pm *rpm) > pm_runtime_set_autosuspend_delay(kdev, 10000); /* 10s */ > pm_runtime_mark_last_busy(kdev); > > + if (IS_DG1(i915)) > + pci_d3cold_disable(pdev); > + > /* > * Take a permanent reference to disable the RPM functionality and drop > * it only when unloading the driver. Use the low level get/put helpers, > @@ -607,12 +611,16 @@ void intel_runtime_pm_disable(struct intel_runtime_pm *rpm) > struct drm_i915_private *i915 = container_of(rpm, > struct drm_i915_private, > runtime_pm); > + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); > struct device *kdev = rpm->kdev; > > /* Transfer rpm ownership back to core */ > drm_WARN(&i915->drm, pm_runtime_get_sync(kdev) < 0, > "Failed to pass rpm ownership back to core\n"); > > + if (IS_DG1(i915)) > + pci_d3cold_enable(pdev); > + > pm_runtime_dont_use_autosuspend(kdev); > > if (!rpm->available) > -- > 2.26.2 >
> -----Original Message----- > From: Vivi, Rodrigo <rodrigo.vivi@intel.com> > Sent: Wednesday, July 20, 2022 7:33 PM > To: Gupta, Anshuman <anshuman.gupta@intel.com> > Cc: intel-gfx@lists.freedesktop.org; Summers, Stuart > <stuart.summers@intel.com> > Subject: Re: [PATCH] drm/i915/dg1: Disable D3 for gfx's VSP > > On Wed, Jul 20, 2022 at 06:51:37PM +0530, Anshuman Gupta wrote: > > When DG1 gfx pci endpoint's parent upstream bridge (VSP) enters to D3, > > any direct memory read from lmem returns with 0xff. > > DG1 requires i915 driven runtime resume in order to read properly from > > lmem, DG1 is unable to wakeup from local memory reads. > > This may breaks using mmap() with lmem object on DG1 as it relies on > > mercy of i915 driven runtime resume. > > why our disable at root_port not working to block this case? > If the root power is not at D3Cold our power shouldn't be cut and our memory > should be there. This is not d3cold issue, there was no ACPI real_power_state means d3cold was not supported. the issue here is reading from memory is not transitioning the d3 -> d0 on DG1. As far as I understand , reading form mmap memory will not cause i915 kernel wakeup. It will be a device wakeup (D3-> D0) without any i915 runtime resume, If we force dpms_on before accessing mmap region. It can read the valid data from lmem. Thanks, Anshuman Gupta. > > > > > Let's not break using mmap() for lmem object on DG1. > > Using pci_d3cold_disable(i915) accordingly to disable D3 for upstream > > bridge. > > > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331 > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> > > --- > > drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > > b/drivers/gpu/drm/i915/intel_runtime_pm.c > > index 6ed5786bcd29..671009fd351a 100644 > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > @@ -559,6 +559,7 @@ void intel_runtime_pm_enable(struct > intel_runtime_pm *rpm) > > struct drm_i915_private *i915 = container_of(rpm, > > struct drm_i915_private, > > runtime_pm); > > + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); > > struct device *kdev = rpm->kdev; > > > > /* > > @@ -574,6 +575,9 @@ void intel_runtime_pm_enable(struct > intel_runtime_pm *rpm) > > pm_runtime_set_autosuspend_delay(kdev, 10000); /* 10s */ > > pm_runtime_mark_last_busy(kdev); > > > > + if (IS_DG1(i915)) > > + pci_d3cold_disable(pdev); > > + > > /* > > * Take a permanent reference to disable the RPM functionality and > drop > > * it only when unloading the driver. Use the low level get/put > > helpers, @@ -607,12 +611,16 @@ void intel_runtime_pm_disable(struct > intel_runtime_pm *rpm) > > struct drm_i915_private *i915 = container_of(rpm, > > struct drm_i915_private, > > runtime_pm); > > + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); > > struct device *kdev = rpm->kdev; > > > > /* Transfer rpm ownership back to core */ > > drm_WARN(&i915->drm, pm_runtime_get_sync(kdev) < 0, > > "Failed to pass rpm ownership back to core\n"); > > > > + if (IS_DG1(i915)) > > + pci_d3cold_enable(pdev); > > + > > pm_runtime_dont_use_autosuspend(kdev); > > > > if (!rpm->available) > > -- > > 2.26.2 > >
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 6ed5786bcd29..671009fd351a 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -559,6 +559,7 @@ void intel_runtime_pm_enable(struct intel_runtime_pm *rpm) struct drm_i915_private *i915 = container_of(rpm, struct drm_i915_private, runtime_pm); + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); struct device *kdev = rpm->kdev; /* @@ -574,6 +575,9 @@ void intel_runtime_pm_enable(struct intel_runtime_pm *rpm) pm_runtime_set_autosuspend_delay(kdev, 10000); /* 10s */ pm_runtime_mark_last_busy(kdev); + if (IS_DG1(i915)) + pci_d3cold_disable(pdev); + /* * Take a permanent reference to disable the RPM functionality and drop * it only when unloading the driver. Use the low level get/put helpers, @@ -607,12 +611,16 @@ void intel_runtime_pm_disable(struct intel_runtime_pm *rpm) struct drm_i915_private *i915 = container_of(rpm, struct drm_i915_private, runtime_pm); + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); struct device *kdev = rpm->kdev; /* Transfer rpm ownership back to core */ drm_WARN(&i915->drm, pm_runtime_get_sync(kdev) < 0, "Failed to pass rpm ownership back to core\n"); + if (IS_DG1(i915)) + pci_d3cold_enable(pdev); + pm_runtime_dont_use_autosuspend(kdev); if (!rpm->available)
When DG1 gfx pci endpoint's parent upstream bridge (VSP) enters to D3, any direct memory read from lmem returns with 0xff. DG1 requires i915 driven runtime resume in order to read properly from lmem, DG1 is unable to wakeup from local memory reads. This may breaks using mmap() with lmem object on DG1 as it relies on mercy of i915 driven runtime resume. Let's not break using mmap() for lmem object on DG1. Using pci_d3cold_disable(i915) accordingly to disable D3 for upstream bridge. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331 Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++++++++ 1 file changed, 8 insertions(+)