From patchwork Thu Sep 29 16:31:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 12994392 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62D79C43217 for ; Thu, 29 Sep 2022 16:33:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F051810EB0B; Thu, 29 Sep 2022 16:32:23 +0000 (UTC) Received: from new4-smtp.messagingengine.com (new4-smtp.messagingengine.com [66.111.4.230]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0B7B110EAF4; Thu, 29 Sep 2022 16:32:11 +0000 (UTC) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailnew.nyi.internal (Postfix) with ESMTP id 6871F580800; Thu, 29 Sep 2022 12:32:10 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Thu, 29 Sep 2022 12:32:10 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h=cc :cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm2; t=1664469130; x= 1664476330; bh=DrWOk2ihzJHxkJ+IH1bPLn7A5tu4crGDmeNO2S0VXzg=; b=d uMzcYnqgAS2lVDbTz/saPWkMyBaRmJvVI9tmqVIhHInTQBHr5CH4e8rzUXYIMZqF pxCmbb2cyVaXOjZMrB6bqHn/uMuDWTk1iY6r5sOUuHF9QyCdGq+5A4lYXetvffOc zPecf+8FBCT9yHHnTTtf7xpKiZ+KnO7qvgLv7aELtTRW4jN8/WfDnQ2PpzSsezY1 hdxZjymV1RU7iP5da8Au3VM/BcixME+kNG0gf70Re5YlwJweq+gN8xYLkFA9xNjW xnUWoV8DK5ChwUSmgLcEtB57ZkbCXnlkNQ3zSTPZhaj+cAD9/QETJ/JL6lBvry9P exJk5jSXJ/Z9Fw0m/LpVg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1664469130; x= 1664476330; bh=DrWOk2ihzJHxkJ+IH1bPLn7A5tu4crGDmeNO2S0VXzg=; b=W mC4h/dJ6lYFOoRtJ81k/5JBuxtbYGRRH+g1iUUA8DGgUPdnCTljTAg5hl5bSMfr6 nO+G5vuXtLRLiH0bFUAL2Bp7ZLTRoLNM3q2tBpRMUgjVHQM/qqHqd6K+yD8Mn7N9 h7BwNW1WI1G91tU2VW8Hg3nAEU643hBy6A8oj9zlIk/JBBXch4sLdhgn10P2P0MC Qkga0YQKBYSngZ7llop9hGmybm026a8Gl7iVaVf6wAsWSGDoPBKp+wTYw+vYCPTG 0bgdjaZlyolne7iSrvzKiDSphVnz6/BK6LmGz5H5coweG6B7fhhAfPbkLM2O/+gY WKCPeWqTCWCoA4by7SxIg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrfeehtddguddtvdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhfffuggfgtgfkfhgjvfevofesthekredtredtjeenucfhrhhomhepofgr gihimhgvucftihhprghrugcuoehmrgigihhmvgestggvrhhnohdrthgvtghhqeenucggtf frrghtthgvrhhnpedvgfevjefhtdetveevhfelieeuueetgfdvgeevkeegudejffegfffg tedtleelhfenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhroh hmpehmrgigihhmvgestggvrhhnohdrthgvtghh X-ME-Proxy: Feedback-ID: i8771445c:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 29 Sep 2022 12:32:09 -0400 (EDT) From: Maxime Ripard Date: Thu, 29 Sep 2022 18:31:19 +0200 MIME-Version: 1.0 Message-Id: <20220728-rpi-analog-tv-properties-v4-25-60d38873f782@cerno.tech> References: <20220728-rpi-analog-tv-properties-v4-0-60d38873f782@cerno.tech> In-Reply-To: <20220728-rpi-analog-tv-properties-v4-0-60d38873f782@cerno.tech> To: Jernej Skrabec , Chen-Yu Tsai , Karol Herbst , Samuel Holland , Lyude Paul , Jani Nikula , Daniel Vetter , Thomas Zimmermann , Emma Anholt , Joonas Lahtinen , Ben Skeggs , David Airlie , Rodrigo Vivi , Tvrtko Ursulin , Maarten Lankhorst , Maxime Ripard X-Mailer: b4 0.11.0-dev-7da52 X-Developer-Signature: v=1; a=openpgp-sha256; l=1435; i=maxime@cerno.tech; h=from:subject:message-id; bh=Yx6xetI7W1bi6cUNbRZTYvzIlC7IPHunx4eteH/lSq8=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmmJzyecRTvmlSdpm0goMJ5JsJrxjoOXaNZO3srfq2+yPT9 5/aXHaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZjI1gCGf1q6N06Gx+e/mVTbx6VYGb V8hV+4zb9jt9m2Nrdn3Oa2W8jI0Ff+iP/W0n07Pds0Dre2d17Y9cxpncv3OBWVlPOL33iF8gEA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Subject: [Intel-gfx] [PATCH v4 25/30] drm/vc4: vec: Fix definition of PAL-M mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?unknown-8bit?q?Dom_Cobley_=3Cdom=40raspberrypi=2Ecom=3E=2C_Dave_Steven?= =?unknown-8bit?q?son_=3Cdave=2Estevenson=40raspberrypi=2Ecom=3E=2C_Phil_Elw?= =?unknown-8bit?q?ell_=3Cphil=40raspberrypi=2Ecom=3E=2C_nouveau=40lists=2Efr?= =?unknown-8bit?q?eedesktop=2Eorg=2C_intel-gfx=40lists=2Efreedesktop=2Eorg?= =?unknown-8bit?q?=2C_linux-kernel=40vger=2Ekernel=2Eorg=2C_dri-devel=40list?= =?unknown-8bit?q?s=2Efreedesktop=2Eorg=2C_Mateusz_Kwiatkowski_=3Ckfyatek+pu?= =?unknown-8bit?q?blicgit=40gmail=2Ecom=3E=2C_Hans_de_Goede_=3Chdegoede=40re?= =?unknown-8bit?q?dhat=2Ecom=3E=2C_Noralf_Tr=C3=B8nnes_=3Cnoralf=40tronnes?= =?unknown-8bit?q?=2Eorg=3E=2C_Geert_Uytterhoeven_=3Cgeert=40linux-m68k=2Eor?= =?unknown-8bit?q?g=3E=2C_Maxime_Ripard_=3Cmaxime=40cerno=2Etech=3E=2C_linux?= =?unknown-8bit?q?-sunxi=40lists=2Elinux=2Edev=2C_linux-arm-kernel=40lists?= =?unknown-8bit?q?=2Einfradead=2Eorg?= Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Mateusz Kwiatkowski PAL-M is a Brazilian analog TV standard that uses a PAL-style chroma subcarrier at 3.575611[888111] MHz on top of 525-line (480i60) timings. This commit makes the driver actually use the proper VEC preset for this mode instead of just changing PAL subcarrier frequency. Acked-by: Noralf Trønnes Signed-off-by: Mateusz Kwiatkowski Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_vec.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c index 4d82ad30449b..adc9bf99e3fd 100644 --- a/drivers/gpu/drm/vc4/vc4_vec.c +++ b/drivers/gpu/drm/vc4/vc4_vec.c @@ -69,6 +69,7 @@ #define VEC_CONFIG0_STD_MASK GENMASK(1, 0) #define VEC_CONFIG0_NTSC_STD 0 #define VEC_CONFIG0_PAL_BDGHI_STD 1 +#define VEC_CONFIG0_PAL_M_STD 2 #define VEC_CONFIG0_PAL_N_STD 3 #define VEC_SCHPH 0x108 @@ -255,10 +256,9 @@ static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = { .config1 = VEC_CONFIG1_C_CVBS_CVBS, }, [VC4_VEC_TV_MODE_PAL_M] = { - .mode = &pal_mode, - .config0 = VEC_CONFIG0_PAL_BDGHI_STD, - .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ, - .custom_freq = 0x223b61d1, + .mode = &ntsc_mode, + .config0 = VEC_CONFIG0_PAL_M_STD, + .config1 = VEC_CONFIG1_C_CVBS_CVBS, }, };