| Message ID | 20220728013420.3750388-10-radhakrishna.sripada@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Initial Meteorlake Support | expand |
On Wed, Jul 27, 2022 at 06:34:06PM -0700, Radhakrishna Sripada wrote: > The initialization sequence for Meteorlake reuses the sequence for > icelake for most parts. Some changes viz. reset PICA handshake > are added. > > Bspec: 49189 > > Cc: Matt Roper <matthew.d.roper@intel.com> > Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display_power.c | 3 +++ > drivers/gpu/drm/i915/i915_reg.h | 3 ++- > 2 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > index 589af257edeb..ccc3f78b1607 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -1381,6 +1381,9 @@ static void intel_pch_reset_handshake(struct drm_i915_private *dev_priv, > reset_bits = RESET_PCH_HANDSHAKE_ENABLE; > } > > + if (DISPLAY_VER(dev_priv) >= 14) > + reset_bits |= MTL_RESET_PICA_HANDSHAKE_EN; > + > val = intel_de_read(dev_priv, reg); > > if (enable) > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 50ddc5ba72b9..baf747adf1db 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5926,7 +5926,8 @@ > _BW_BUDDY1_PAGE_MASK)) > > #define HSW_NDE_RSTWRN_OPT _MMIO(0x46408) > -#define RESET_PCH_HANDSHAKE_ENABLE (1 << 4) > +#define MTL_RESET_PICA_HANDSHAKE_EN REG_BIT(6) > +#define RESET_PCH_HANDSHAKE_ENABLE REG_BIT(4) > > #define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > #define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > -- > 2.25.1 >
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 589af257edeb..ccc3f78b1607 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -1381,6 +1381,9 @@ static void intel_pch_reset_handshake(struct drm_i915_private *dev_priv, reset_bits = RESET_PCH_HANDSHAKE_ENABLE; } + if (DISPLAY_VER(dev_priv) >= 14) + reset_bits |= MTL_RESET_PICA_HANDSHAKE_EN; + val = intel_de_read(dev_priv, reg); if (enable) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 50ddc5ba72b9..baf747adf1db 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5926,7 +5926,8 @@ _BW_BUDDY1_PAGE_MASK)) #define HSW_NDE_RSTWRN_OPT _MMIO(0x46408) -#define RESET_PCH_HANDSHAKE_ENABLE (1 << 4) +#define MTL_RESET_PICA_HANDSHAKE_EN REG_BIT(6) +#define RESET_PCH_HANDSHAKE_ENABLE REG_BIT(4) #define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) #define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30)
The initialization sequence for Meteorlake reuses the sequence for icelake for most parts. Some changes viz. reset PICA handshake are added. Bspec: 49189 Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> --- drivers/gpu/drm/i915/display/intel_display_power.c | 3 +++ drivers/gpu/drm/i915/i915_reg.h | 3 ++- 2 files changed, 5 insertions(+), 1 deletion(-)