diff mbox series

[14/19] drm/i915/perf: Add Wa_1608133521:dg2

Message ID 20220823000342.281222-15-umesh.nerlige.ramappa@intel.com (mailing list archive)
State New, archived
Headers show
Series Add DG2 OA support | expand

Commit Message

Umesh Nerlige Ramappa Aug. 23, 2022, 12:03 a.m. UTC 
DG2 introduces 64 bit counters and OA reports that have 64 bit values
for fields in the report header - report_id, timestamp, context_id and
gpu ticks. i915 uses report_id, timestamp and context_id to check for
valid reports.

In some DG2 variants, only the lower dwords for timestamp, report_id and
context_id are accessible. Add workaround for such reports.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/i915/i915_perf.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 3a1e0c5271e2..494c67e29d6c 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -310,7 +310,7 @@  static u32 i915_oa_max_sample_rate = 100000;
  * be used as a mask to align the OA tail pointer. In some of the
  * formats, R is used to denote reserved field.
  */
-static const struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {
+static struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {
 	[I915_OA_FORMAT_A13]	    = { 0, 64 },
 	[I915_OA_FORMAT_A29]	    = { 1, 128 },
 	[I915_OA_FORMAT_A13_B8_C8]  = { 2, 128 },
@@ -4755,6 +4755,13 @@  static void oa_init_supported_formats(struct i915_perf *perf)
 		/* Wa_16010703925:dg2 */
 		clear_bit(I915_OAR_FORMAT_A36u64_B8_C8, perf->format_mask);
  	}
+
+	if (IS_DG2_GRAPHICS_STEP(i915, G10, STEP_A0, STEP_B0) ||
+	    IS_DG2_GRAPHICS_STEP(i915, G11, STEP_A0, STEP_FOREVER)) {
+		/* Wa_1608133521:dg2 */
+		oa_formats[I915_OAR_FORMAT_A36u64_B8_C8].header = HDR_32_BIT;
+		oa_formats[I915_OA_FORMAT_A38u64_R2u64_B8_C8].header = HDR_32_BIT;
+	}
 }
 
 static void i915_perf_init_info(struct drm_i915_private *i915)