| Message ID | 20220905102355.176622-2-jouni.hogander@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/psr: Disable PSR2 when SDP is sent on prior line | expand |
> -----Original Message----- > From: Hogander, Jouni <jouni.hogander@intel.com> > Sent: Monday, September 5, 2022 1:24 PM > To: intel-gfx@lists.freedesktop.org > Cc: Hogander, Jouni <jouni.hogander@intel.com>; Kahola, Mika > <mika.kahola@intel.com>; Souza, Jose <jose.souza@intel.com> > Subject: [PATCH 1/2] drm/i915/psr: Equation changed for sending start/stop on > prior line > > Equation for sending start/end SDP prior to the SU region start/end has > changed. Update used formula. > > Bspec: 49274 > > Cc: Mika Kahola <mika.kahola@intel.com> > Cc: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 079b7d3d0c53..6f03bf16d6f4 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -805,8 +805,8 @@ static bool > _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d > hblank_total = adjusted_mode->crtc_hblank_end - adjusted_mode- > >crtc_hblank_start; > hblank_ns = div_u64(1000000ULL * hblank_total, adjusted_mode- > >crtc_clock); > > - /* From spec: (72 / number of lanes) * 1000 / symbol clock frequency > MHz */ > - req_ns = (72 / crtc_state->lane_count) * 1000 / (crtc_state->port_clock > / 1000); > + /* From spec: ((60 / number of lanes) + 11) * 1000 / symbol clock > frequency MHz */ > + req_ns = ((60 / crtc_state->lane_count) + 11) * 1000 / > +(crtc_state->port_clock / 1000); > > if ((hblank_ns - req_ns) > 100) > return true; > -- > 2.34.1
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 079b7d3d0c53..6f03bf16d6f4 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -805,8 +805,8 @@ static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d hblank_total = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; hblank_ns = div_u64(1000000ULL * hblank_total, adjusted_mode->crtc_clock); - /* From spec: (72 / number of lanes) * 1000 / symbol clock frequency MHz */ - req_ns = (72 / crtc_state->lane_count) * 1000 / (crtc_state->port_clock / 1000); + /* From spec: ((60 / number of lanes) + 11) * 1000 / symbol clock frequency MHz */ + req_ns = ((60 / crtc_state->lane_count) + 11) * 1000 / (crtc_state->port_clock / 1000); if ((hblank_ns - req_ns) > 100) return true;
Equation for sending start/end SDP prior to the SU region start/end has changed. Update used formula. Bspec: 49274 Cc: Mika Kahola <mika.kahola@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Jouni Högander <jouni.hogander@intel.com> --- drivers/gpu/drm/i915/display/intel_psr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)