@@ -2015,8 +2015,16 @@ static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
* requires all pipes to be off, false if not.
*/
bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,
- const struct intel_cdclk_config *b)
+ struct intel_cdclk_config *b)
{
+ struct cdclk_step *cdclk_transition = b->steps;
+
+ if (a->cdclk != b->cdclk || a->vco != b->vco ||
+ a->ref != b->ref) {
+ cdclk_transition->action = CDCLK_LEGACY;
+ cdclk_transition->cdclk = b->cdclk;
+ }
+
return a->cdclk != b->cdclk ||
a->vco != b->vco ||
a->ref != b->ref;
@@ -2065,7 +2073,7 @@ static bool intel_cdclk_can_cd2x_update(struct drm_i915_private *dev_priv,
* True if the CDCLK configurations don't match, false if they do.
*/
static bool intel_cdclk_changed(const struct intel_cdclk_config *a,
- const struct intel_cdclk_config *b)
+ struct intel_cdclk_config *b)
{
return intel_cdclk_needs_modeset(a, b) ||
a->voltage_level != b->voltage_level;
@@ -2091,7 +2099,7 @@ void intel_cdclk_dump_config(struct drm_i915_private *i915,
* if necessary.
*/
static void intel_set_cdclk(struct drm_i915_private *dev_priv,
- const struct intel_cdclk_config *cdclk_config,
+ struct intel_cdclk_config *cdclk_config,
enum pipe pipe)
{
struct intel_encoder *encoder;
@@ -2163,7 +2171,7 @@ intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state)
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_cdclk_state *old_cdclk_state =
intel_atomic_get_old_cdclk_state(state);
- const struct intel_cdclk_state *new_cdclk_state =
+ struct intel_cdclk_state *new_cdclk_state =
intel_atomic_get_new_cdclk_state(state);
enum pipe pipe = new_cdclk_state->pipe;
@@ -2192,7 +2200,7 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state)
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_cdclk_state *old_cdclk_state =
intel_atomic_get_old_cdclk_state(state);
- const struct intel_cdclk_state *new_cdclk_state =
+ struct intel_cdclk_state *new_cdclk_state =
intel_atomic_get_new_cdclk_state(state);
enum pipe pipe = new_cdclk_state->pipe;
@@ -75,7 +75,7 @@ void intel_update_max_cdclk(struct drm_i915_private *dev_priv);
void intel_update_cdclk(struct drm_i915_private *dev_priv);
u32 intel_read_rawclk(struct drm_i915_private *dev_priv);
bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,
- const struct intel_cdclk_config *b);
+ struct intel_cdclk_config *b);
void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state);
void intel_set_cdclk_post_plane_update(struct intel_atomic_state *state);
void intel_cdclk_dump_config(struct drm_i915_private *i915,
Populate the new struct steps for the legacy modeset case. Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> --- drivers/gpu/drm/i915/display/intel_cdclk.c | 18 +++++++++++++----- drivers/gpu/drm/i915/display/intel_cdclk.h | 2 +- 2 files changed, 14 insertions(+), 6 deletions(-)