From patchwork Tue Oct 4 13:19:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matthew Auld X-Patchwork-Id: 12998316 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 69459C433F5 for ; Tue, 4 Oct 2022 13:19:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 17E4D10E6FC; Tue, 4 Oct 2022 13:19:54 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id D9BAE10E706 for ; Tue, 4 Oct 2022 13:19:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664889589; x=1696425589; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=qE0stFtDl4U2of9S3MG6Xz5/Ofv2I82YBK8wMkIpXoc=; b=SHFtbWphtXaR0AaYXNKZCoKGJmEuW3MUCf9s/pXXfcCJXsQYPxDYGzZj aCg0v6lxO3tNSi/VuYkW/RzsTlEqoiDNTfeD88gxvguHE8JAMfJuCv8rD oeISzUp/4REjywZjIfBgDZacfnKlSVXITMmeNqsa4qEB7X49EJxPJWZCK 9QPYxSfzspVI2EUUPfgaAGjhOEq0hetMkAW5B6MkunQlkR7hL7lT/D3zh ijijE+8faNa6iDibD8f7YoCYUpM15cXEx+HrarjkmaGoBugHC4DfBC6W2 vvS/0wPtqKt229zhHp54KeQMPaVCLOMmzUO5bQzRtf5VvD7xj8KUbSLkm w==; X-IronPort-AV: E=McAfee;i="6500,9779,10490"; a="300507219" X-IronPort-AV: E=Sophos;i="5.95,158,1661842800"; d="scan'208";a="300507219" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2022 06:19:49 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10490"; a="654766937" X-IronPort-AV: E=Sophos;i="5.95,158,1661842800"; d="scan'208";a="654766937" Received: from ngverso-mobl2.ger.corp.intel.com (HELO mwauld-desk1.intel.com) ([10.252.7.149]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2022 06:19:39 -0700 From: Matthew Auld To: intel-gfx@lists.freedesktop.org Date: Tue, 4 Oct 2022 14:19:12 +0100 Message-Id: <20221004131916.233474-1-matthew.auld@intel.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nirmoy Das , Jianshui Yu Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The copy is async (if there even is one), but when later updating the GGTT we always sync against the binding, which will in turn sync against any moves. Signed-off-by: Matthew Auld Cc: Jianshui Yu Cc: Ville Syrjälä Cc: Nirmoy Das Reviewed-by: Nirmoy Das --- drivers/gpu/drm/i915/display/intel_fb_pin.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c index c86e5d4ee016..0cd9e8cb078b 100644 --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c @@ -141,7 +141,6 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, ret = i915_gem_object_attach_phys(obj, alignment); else if (!ret && HAS_LMEM(dev_priv)) ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0); - /* TODO: Do we need to sync when migration becomes async? */ if (!ret) ret = i915_gem_object_pin_pages(obj); if (ret)