Message ID | 20221109111529.27476-3-animesh.manna@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/3] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup | expand |
On Wed, 09 Nov 2022, Animesh Manna <animesh.manna@intel.com> wrote: > Kernel warning triggered as vdd went down after certain time during > aux transfer in connector init sequence. To solve the kernel > warning adjust power domain and vdd wakeref count. > Currently issue seen on ADL so add the above adjustment part of > ADL platform check, if needed will extend for future platform. > > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Animesh Manna <animesh.manna@intel.com> > --- > drivers/gpu/drm/i915/display/intel_pps.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c > index 5738af154bd2..ebc03c8f73c5 100644 > --- a/drivers/gpu/drm/i915/display/intel_pps.c > +++ b/drivers/gpu/drm/i915/display/intel_pps.c > @@ -597,8 +597,15 @@ bool intel_pps_vdd_on_unlocked(struct intel_dp *intel_dp) > cancel_delayed_work(&intel_dp->pps.panel_vdd_work); > intel_dp->pps.want_panel_vdd = true; > > - if (edp_have_panel_vdd(intel_dp)) > + if (edp_have_panel_vdd(intel_dp)) { > return need_to_disable; > + } else { > + if ((IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) && > + intel_dp->pps.vdd_wakeref) > + intel_display_power_put(dev_priv, > + intel_aux_power_domain(dig_port), > + fetch_and_zero(&intel_dp->pps.vdd_wakeref)); > + } Already replied to patch 2, but repeating here: We have two eDP, each with their own intel_dp->pps, but both checking the same PPS hardware in edp_have_panel_vdd(). This is not the fix. The fix is to ensure they both use their own PPS harware instance. That's what the goal with patches 1&2 is, but there's still an issue there. BR, Jani. > > drm_WARN_ON(&dev_priv->drm, intel_dp->pps.vdd_wakeref); > intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index 5738af154bd2..ebc03c8f73c5 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -597,8 +597,15 @@ bool intel_pps_vdd_on_unlocked(struct intel_dp *intel_dp) cancel_delayed_work(&intel_dp->pps.panel_vdd_work); intel_dp->pps.want_panel_vdd = true; - if (edp_have_panel_vdd(intel_dp)) + if (edp_have_panel_vdd(intel_dp)) { return need_to_disable; + } else { + if ((IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) && + intel_dp->pps.vdd_wakeref) + intel_display_power_put(dev_priv, + intel_aux_power_domain(dig_port), + fetch_and_zero(&intel_dp->pps.vdd_wakeref)); + } drm_WARN_ON(&dev_priv->drm, intel_dp->pps.vdd_wakeref); intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,
Kernel warning triggered as vdd went down after certain time during aux transfer in connector init sequence. To solve the kernel warning adjust power domain and vdd wakeref count. Currently issue seen on ADL so add the above adjustment part of ADL platform check, if needed will extend for future platform. Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> --- drivers/gpu/drm/i915/display/intel_pps.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)