diff mbox series

[2/4] drm/i915/panelreplay: Added HAS_PANEL_REPLAY() macro

Message ID 20221110150307.3366-3-animesh.manna@intel.com (mailing list archive)
State New, archived
Headers show
Series Panel replay phase1 implementation | expand

Commit Message

Manna, Animesh Nov. 10, 2022, 3:03 p.m. UTC
Platforms having Display 13 and above will support panel
replay feature of DP 2.0 monitor. Added a HAS_PANEL_REPLAY()
macro to check for panel replay capability.

Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Murthy, Arun R July 14, 2023, 4:16 a.m. UTC | #1
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Animesh Manna
> Sent: Thursday, November 10, 2022 8:33 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 2/4] drm/i915/panelreplay: Added
> HAS_PANEL_REPLAY() macro
> 
> Platforms having Display 13 and above will support panel replay feature of
> DP 2.0 monitor. Added a HAS_PANEL_REPLAY() macro to check for panel
> replay capability.
> 

Should we also check for DP2.0 supported monitor plugged in along with this Display 13 check?

Thanks and Regards,
Arun R Murthy
--------------------

> Cc: Jouni Högander <jouni.hogander@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h index 05b3300cc4ed..ba47f4409d0b
> 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -873,6 +873,7 @@ IS_SUBPLATFORM(const struct drm_i915_private
> *i915,
>  #define HAS_DDI(dev_priv)		 (INTEL_INFO(dev_priv)-
> >display.has_ddi)
>  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)-
> >display.has_fpga_dbg)
>  #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)-
> >display.has_psr)
> +#define HAS_PANEL_REPLAY(dev_priv)	 (DISPLAY_VER(dev_priv) >=
> 13)
>  #define HAS_PSR_HW_TRACKING(dev_priv) \
>  	(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
>  #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >=
> 12)
> --
> 2.29.0
Manna, Animesh July 18, 2023, 9:30 a.m. UTC | #2
> -----Original Message-----
> From: Murthy, Arun R <arun.r.murthy@intel.com>
> Sent: Friday, July 14, 2023 9:47 AM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Subject: RE: [Intel-gfx] [PATCH 2/4] drm/i915/panelreplay: Added
> HAS_PANEL_REPLAY() macro
> 
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of
> > Animesh Manna
> > Sent: Thursday, November 10, 2022 8:33 PM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 2/4] drm/i915/panelreplay: Added
> > HAS_PANEL_REPLAY() macro
> >
> > Platforms having Display 13 and above will support panel replay
> > feature of DP 2.0 monitor. Added a HAS_PANEL_REPLAY() macro to check
> > for panel replay capability.
> >
> 
> Should we also check for DP2.0 supported monitor plugged in along with this
> Display 13 check?

Agree, Currently HAS_DP20() is having DISPLAY_VER() check in it. So will modify like below,
#define HAS_PANEL_REPLAY(i915)	HAS_DP20(i915)

Regards,
Animesh

> 
> Thanks and Regards,
> Arun R Murthy
> --------------------
> 
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h index 05b3300cc4ed..ba47f4409d0b
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -873,6 +873,7 @@ IS_SUBPLATFORM(const struct drm_i915_private
> > *i915,
> >  #define HAS_DDI(dev_priv)		 (INTEL_INFO(dev_priv)-
> > >display.has_ddi)
> >  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)-
> > >display.has_fpga_dbg)
> >  #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)-
> > >display.has_psr)
> > +#define HAS_PANEL_REPLAY(dev_priv)	 (DISPLAY_VER(dev_priv) >=
> > 13)
> >  #define HAS_PSR_HW_TRACKING(dev_priv) \
> >  	(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
> >  #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >=
> > 12)
> > --
> > 2.29.0
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 05b3300cc4ed..ba47f4409d0b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -873,6 +873,7 @@  IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_DDI(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_ddi)
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
 #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_psr)
+#define HAS_PANEL_REPLAY(dev_priv)	 (DISPLAY_VER(dev_priv) >= 13)
 #define HAS_PSR_HW_TRACKING(dev_priv) \
 	(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
 #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >= 12)