From patchwork Fri Dec 9 10:18:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kai Vehmanen X-Patchwork-Id: 13069457 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8216FC4332F for ; Fri, 9 Dec 2022 10:18:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1977910E51A; Fri, 9 Dec 2022 10:18:54 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 86FD410E518 for ; Fri, 9 Dec 2022 10:18:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670581128; x=1702117128; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ADEYj8kskGbNmo00w5Sm0GFF91EaWE2imwSisI+6PQk=; b=E+5t7vp6j5Zku5GckHYn+IhQkglUkew+tS4FSiVqSxitYmIgCFbYZevj W46Z2/PAKeVkWqYgDcyolQ9MjqoUViTLFqJct/dD/0z8pZVnv0NzXIdLh SC2A123bg2FbbPSD4c2zPUYmP9aJ4/XRb/R1lCsvAZFMWlRfVBw0jY3jc sxKSXujC6T3j+BxllZ10iUO0fj3AF0xJMrU4fqRVv9frJC6N8eNX2YVc2 cHtnx816W1yiTEYpI0P85VpiaQZSW5j6HPhNcuPdMZp0y+PUF80zQvLNp 9DGcj+zUDvoDg14nMsBDDRn1j6DraG70cTpu0JogA50tLv0KVd+j3G2ZF A==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="316135191" X-IronPort-AV: E=Sophos;i="5.96,230,1665471600"; d="scan'208";a="316135191" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 02:18:48 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="649510766" X-IronPort-AV: E=Sophos;i="5.96,230,1665471600"; d="scan'208";a="649510766" Received: from eliteleevi.tm.intel.com ([10.237.54.20]) by fmsmga007.fm.intel.com with ESMTP; 09 Dec 2022 02:18:46 -0800 From: Kai Vehmanen To: alsa-devel@alsa-project.org, tiwai@suse.de Date: Fri, 9 Dec 2022 12:18:20 +0200 Message-Id: <20221209101822.3893675-2-kai.vehmanen@linux.intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221209101822.3893675-1-kai.vehmanen@linux.intel.com> References: <20221209101822.3893675-1-kai.vehmanen@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 1/3] ALSA: hda/hdmi: fix i915 silent stream programming flow X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, Pierre-Louis Bossart , Rodrigo Vivi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The i915 display codec may not successfully transition to normal audio streaming mode, if the stream id is programmed while codec is actively transmitting data. This can happen when silent stream is enabled in KAE mode. Fix the issue by implementing a i915 specific programming flow, where the silent streaming is temporarily stopped, a small delay is applied to ensure display codec becomes idle, and then proceed with reprogramming the stream ID. Fixes: 15175a4f2bbb ("ALSA: hda/hdmi: add keep-alive support for ADL-P and DG2") Link: https://gitlab.freedesktop.org/drm/intel/-/issues/7353 Signed-off-by: Kai Vehmanen Reviewed-by: Pierre-Louis Bossart Tested-by: Rodrigo Vivi --- sound/pci/hda/patch_hdmi.c | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index 7a40ddfd695a..48bb23745ed3 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -2879,9 +2879,33 @@ static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, hda_nid_t pin_nid, int dev_id, u32 stream_tag, int format) { + struct hdmi_spec *spec = codec->spec; + int pin_idx = pin_id_to_pin_index(codec, pin_nid, dev_id); + struct hdmi_spec_per_pin *per_pin; + int res; + + if (pin_idx < 0) + per_pin = NULL; + else + per_pin = get_pin(spec, pin_idx); + haswell_verify_D0(codec, cvt_nid, pin_nid); - return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id, - stream_tag, format); + + if (spec->silent_stream_type == SILENT_STREAM_KAE && per_pin && per_pin->silent_stream) { + silent_stream_set_kae(codec, per_pin, false); + /* wait for pending transfers in codec to clear */ + usleep_range(100, 200); + } + + res = hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id, + stream_tag, format); + + if (spec->silent_stream_type == SILENT_STREAM_KAE && per_pin && per_pin->silent_stream) { + usleep_range(100, 200); + silent_stream_set_kae(codec, per_pin, true); + } + + return res; } /* pin_cvt_fixup ops override for HSW+ and VLV+ */