From patchwork Sat Dec 10 03:01:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Umesh Nerlige Ramappa X-Patchwork-Id: 13070192 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E42DEC4332F for ; Sat, 10 Dec 2022 03:01:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 84E8010E095; Sat, 10 Dec 2022 03:01:26 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id D035110E063 for ; Sat, 10 Dec 2022 03:01:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670641281; x=1702177281; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=twCOOzvTl9h4scH3pgXQhg635DAnZfTrii418m6SRpc=; b=L/o4DcWCqi27720imOn+r2UtX0HdhvNHL8635wfbJWbbDqyC1LwdPCav eQM4Xcn5kc77pIDQQ6/fZI/vZKvMWcGYM0QP2g8hzPnw2riCHlVFYAkx0 z1tIcY6FM0kc1ri0Ydav7jCOJRW/cO9WhyAV+HYBxepDBVL/5ZdfOt6Lf ZPJru+0ToaDGBn1Cjm2VrWq/XP5GJB58p8E7S4SXo+5DLjhsb4GeXUoK8 lKVbzFLs7q1/Uoe6FAa3Oz7Qi/XGNBY5GGzi5nXhQr8XAlyS272cf8ZTe +e2nv7KoOy5qlE6heanKKAx+7J5Qc0zLPZBHSxa+bATXxt8oGZXYs97Lr g==; X-IronPort-AV: E=McAfee;i="6500,9779,10556"; a="379800536" X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="379800536" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 19:01:20 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10556"; a="597914726" X-IronPort-AV: E=Sophos;i="5.96,232,1665471600"; d="scan'208";a="597914726" Received: from unerlige-desk.jf.intel.com ([10.165.21.199]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2022 19:01:20 -0800 From: Umesh Nerlige Ramappa To: intel-gfx@lists.freedesktop.org Date: Fri, 9 Dec 2022 19:01:15 -0800 Message-Id: <20221210030116.1777214-4-umesh.nerlige.ramappa@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221210030116.1777214-1-umesh.nerlige.ramappa@intel.com> References: <20221210030116.1777214-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3 3/4] drm/i915/mtl: Update OA mux whitelist for MTL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" 0x20cc (WAIT_FOR_RC6_EXIT on other platforms) is repurposed on MTL. Use a separate mux table to verify oa configs passed by user. Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_perf.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 1a8618a787d6..41f6c0923ba5 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -4322,6 +4322,17 @@ static const struct i915_range gen12_oa_mux_regs[] = { {} }; +/* + * Ref: 14010536224: + * 0x20cc is repurposed on MTL, so use a separate array for MTL. + */ +static const struct i915_range mtl_oa_mux_regs[] = { + { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */ + { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */ + { .start = 0x9840, .end = 0x9840 }, /* GDT_CHICKEN_BITS */ + { .start = 0x9884, .end = 0x9888 }, /* NOA_WRITE */ +}; + static bool gen7_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr) { return reg_in_range_table(addr, gen7_oa_b_counters); @@ -4365,7 +4376,10 @@ static bool xehp_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr) static bool gen12_is_valid_mux_addr(struct i915_perf *perf, u32 addr) { - return reg_in_range_table(addr, gen12_oa_mux_regs); + if (IS_METEORLAKE(perf->i915)) + return reg_in_range_table(addr, mtl_oa_mux_regs); + else + return reg_in_range_table(addr, gen12_oa_mux_regs); } static u32 mask_reg_value(u32 reg, u32 val)