| Message ID | 20230112094131.550252-1-chaitanya.kumar.borah@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/display: Fix typo for reference clock | expand |
On Thu, Jan 12, 2023 at 03:11:31PM +0530, Chaitanya Kumar Borah wrote: > Fix typo for reference clock from 24400 to 24000 > > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Fixes: 626426ff9ce4 ("drm/i915/adl_p: Add cdclk support for ADL-P") Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > index 0c107a38f9d0..7e16b655c833 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > @@ -1319,7 +1319,7 @@ static const struct intel_cdclk_vals adlp_cdclk_table[] = { > { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 }, > { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 }, > { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 }, > - { .refclk = 24400, .cdclk = 648000, .divider = 2, .ratio = 54 }, > + { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 }, > > { .refclk = 38400, .cdclk = 179200, .divider = 3, .ratio = 14 }, > { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 }, > -- > 2.25.1 >
On Thu, Jan 12, 2023 at 09:40:42AM -0800, Matt Roper wrote: > On Thu, Jan 12, 2023 at 03:11:31PM +0530, Chaitanya Kumar Borah wrote: > > Fix typo for reference clock from 24400 to 24000 > > > > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> > > Fixes: 626426ff9ce4 ("drm/i915/adl_p: Add cdclk support for ADL-P") > Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Oh, I guess one suggestion (which can be made while applying; no need to re-send): it would be better to use a "drm/i915/adlp" prefix rather than "drm/i915/display" since this is a platform-specific change. Matt > > > --- > > drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > > index 0c107a38f9d0..7e16b655c833 100644 > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > > @@ -1319,7 +1319,7 @@ static const struct intel_cdclk_vals adlp_cdclk_table[] = { > > { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 }, > > { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 }, > > { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 }, > > - { .refclk = 24400, .cdclk = 648000, .divider = 2, .ratio = 54 }, > > + { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 }, > > > > { .refclk = 38400, .cdclk = 179200, .divider = 3, .ratio = 14 }, > > { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 }, > > -- > > 2.25.1 > > > > -- > Matt Roper > Graphics Software Engineer > Linux GPU Platform Enablement > Intel Corporation
On Thu, 12 Jan 2023, Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote: > Fix typo for reference clock from 24400 to 24000 Is there a bug report? What's the impact? It's obvious and easy to say there's a typo, but the harder part is matching this against observed faulty behaviour, and that's something people will want to do to match bug reports and fixes. BR, Jani. > > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> > --- > drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > index 0c107a38f9d0..7e16b655c833 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > @@ -1319,7 +1319,7 @@ static const struct intel_cdclk_vals adlp_cdclk_table[] = { > { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 }, > { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 }, > { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 }, > - { .refclk = 24400, .cdclk = 648000, .divider = 2, .ratio = 54 }, > + { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 }, > > { .refclk = 38400, .cdclk = 179200, .divider = 3, .ratio = 14 }, > { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 },
Hello Jani, There are no bug reports for it. It was pointed out by Matt in another patch series. https://patchwork.freedesktop.org/patch/517283/?series=111472&rev=3 Regards Chaitanya > -----Original Message----- > From: Jani Nikula <jani.nikula@linux.intel.com> > Sent: Monday, January 16, 2023 2:42 PM > To: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>; intel- > gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Fix typo for reference clock > > On Thu, 12 Jan 2023, Chaitanya Kumar Borah > <chaitanya.kumar.borah@intel.com> wrote: > > Fix typo for reference clock from 24400 to 24000 > > Is there a bug report? What's the impact? > > It's obvious and easy to say there's a typo, but the harder part is matching > this against observed faulty behaviour, and that's something people will > want to do to match bug reports and fixes. > > BR, > Jani. > > > > > Signed-off-by: Chaitanya Kumar Borah > <chaitanya.kumar.borah@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c > > b/drivers/gpu/drm/i915/display/intel_cdclk.c > > index 0c107a38f9d0..7e16b655c833 100644 > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > > @@ -1319,7 +1319,7 @@ static const struct intel_cdclk_vals > adlp_cdclk_table[] = { > > { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 }, > > { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 }, > > { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 }, > > - { .refclk = 24400, .cdclk = 648000, .divider = 2, .ratio = 54 }, > > + { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 }, > > > > { .refclk = 38400, .cdclk = 179200, .divider = 3, .ratio = 14 }, > > { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 }, > > -- > Jani Nikula, Intel Open Source Graphics Center
Hello Jani, Sorry about the previous mail. Replying in-line. > -----Original Message----- > From: Jani Nikula <jani.nikula@linux.intel.com> > Sent: Monday, January 16, 2023 2:42 PM > To: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>; intel- > gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Fix typo for reference clock > > On Thu, 12 Jan 2023, Chaitanya Kumar Borah > <chaitanya.kumar.borah@intel.com> wrote: > > Fix typo for reference clock from 24400 to 24000 > > Is there a bug report? What's the impact? > > It's obvious and easy to say there's a typo, but the harder part is matching > this against observed faulty behaviour, and that's something people will > want to do to match bug reports and fixes. > There are no bug reports for it. It was pointed out by Matt in another patch series. https://patchwork.freedesktop.org/patch/517283/?series=111472&rev=3 Regards Chaitanya > BR, > Jani. > > > > > Signed-off-by: Chaitanya Kumar Borah > <chaitanya.kumar.borah@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c > > b/drivers/gpu/drm/i915/display/intel_cdclk.c > > index 0c107a38f9d0..7e16b655c833 100644 > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > > @@ -1319,7 +1319,7 @@ static const struct intel_cdclk_vals > adlp_cdclk_table[] = { > > { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 }, > > { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 }, > > { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 }, > > - { .refclk = 24400, .cdclk = 648000, .divider = 2, .ratio = 54 }, > > + { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 }, > > > > { .refclk = 38400, .cdclk = 179200, .divider = 3, .ratio = 14 }, > > { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 }, > > -- > Jani Nikula, Intel Open Source Graphics Center
On Thu, 12 Jan 2023, Matt Roper <matthew.d.roper@intel.com> wrote: > On Thu, Jan 12, 2023 at 03:11:31PM +0530, Chaitanya Kumar Borah wrote: >> Fix typo for reference clock from 24400 to 24000 >> >> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> > > Fixes: 626426ff9ce4 ("drm/i915/adl_p: Add cdclk support for ADL-P") > Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Pushed to drm-intel-next, thanks for the patch and review. BR, Jani. > >> --- >> drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c >> index 0c107a38f9d0..7e16b655c833 100644 >> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c >> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c >> @@ -1319,7 +1319,7 @@ static const struct intel_cdclk_vals adlp_cdclk_table[] = { >> { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 }, >> { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 }, >> { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 }, >> - { .refclk = 24400, .cdclk = 648000, .divider = 2, .ratio = 54 }, >> + { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 }, >> >> { .refclk = 38400, .cdclk = 179200, .divider = 3, .ratio = 14 }, >> { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 }, >> -- >> 2.25.1 >>
> -----Original Message----- > From: Jani Nikula <jani.nikula@linux.intel.com> > Sent: Monday, January 30, 2023 5:29 PM > To: Roper, Matthew D <matthew.d.roper@intel.com>; Borah, Chaitanya > Kumar <chaitanya.kumar.borah@intel.com> > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Fix typo for reference > clock > > On Thu, 12 Jan 2023, Matt Roper <matthew.d.roper@intel.com> wrote: > > On Thu, Jan 12, 2023 at 03:11:31PM +0530, Chaitanya Kumar Borah wrote: > >> Fix typo for reference clock from 24400 to 24000 > >> > >> Signed-off-by: Chaitanya Kumar Borah > <chaitanya.kumar.borah@intel.com> > > > > Fixes: 626426ff9ce4 ("drm/i915/adl_p: Add cdclk support for ADL-P") > > Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > > Pushed to drm-intel-next, thanks for the patch and review. > Thank you Jani. Regards Chaitanya > BR, > Jani. > > > > >> --- > >> drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c > b/drivers/gpu/drm/i915/display/intel_cdclk.c > >> index 0c107a38f9d0..7e16b655c833 100644 > >> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > >> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > >> @@ -1319,7 +1319,7 @@ static const struct intel_cdclk_vals > adlp_cdclk_table[] = { > >> { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 }, > >> { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 }, > >> { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 }, > >> - { .refclk = 24400, .cdclk = 648000, .divider = 2, .ratio = 54 }, > >> + { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 }, > >> > >> { .refclk = 38400, .cdclk = 179200, .divider = 3, .ratio = 14 }, > >> { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 }, > >> -- > >> 2.25.1 > >> > > -- > Jani Nikula, Intel Open Source Graphics Center
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 0c107a38f9d0..7e16b655c833 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1319,7 +1319,7 @@ static const struct intel_cdclk_vals adlp_cdclk_table[] = { { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 }, { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 }, { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 }, - { .refclk = 24400, .cdclk = 648000, .divider = 2, .ratio = 54 }, + { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 }, { .refclk = 38400, .cdclk = 179200, .divider = 3, .ratio = 14 }, { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 },
Fix typo for reference clock from 24400 to 24000 Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> --- drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)