diff mbox series

drm/i915/mtl: Wa_22011802037: don't complain about missing regs on MTL

Message ID 20230124231111.1786429-1-umesh.nerlige.ramappa@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/mtl: Wa_22011802037: don't complain about missing regs on MTL | expand

Commit Message

Umesh Nerlige Ramappa Jan. 24, 2023, 11:11 p.m. UTC
From: John Harrison <John.C.Harrison@Intel.com>

Wa_22011802037 requires waiting for an engine-specific register to
clear. A missing entry for GSC engine in the register table is flagged
as a drm_err. The drm_err was originally intended to catch missing
register entries for newer engines, however, it was later found that the
WA is only required for 'legacy' engines. So just drop the drm_err.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

Comments

Andrzej Hajda Jan. 25, 2023, 7:39 a.m. UTC | #1
On 25.01.2023 00:11, Umesh Nerlige Ramappa wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> Wa_22011802037 requires waiting for an engine-specific register to
> clear. A missing entry for GSC engine in the register table is flagged
> as a drm_err. The drm_err was originally intended to catch missing
> register entries for newer engines, however, it was later found that the
> WA is only required for 'legacy' engines. So just drop the drm_err.
> 
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 +----
>   1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 922f1bb22dc6..f99bcc2113cb 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -1584,11 +1584,8 @@ static u32 __cs_pending_mi_force_wakes(struct intel_engine_cs *engine)
>   	};
>   	u32 val;
>   
> -	if (!_reg[engine->id].reg) {
> -		drm_err(&engine->i915->drm,
> -			"MSG IDLE undefined for engine id %u\n", engine->id);
> +	if (!_reg[engine->id].reg)
>   		return 0;
> -	}

While at it you can convert to i915_mmio_reg_valid.
With or without this:
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>

Regards
Andrzej

>   
>   	val = intel_uncore_read(engine->uncore, _reg[engine->id]);
>
Umesh Nerlige Ramappa Jan. 26, 2023, 8:12 p.m. UTC | #2
On Wed, Jan 25, 2023 at 07:10:33AM +0000, Patchwork wrote:
>   Patch Details
>
>Series:  drm/i915/mtl: Wa_22011802037: don't complain about missing regs on MTL
>URL:     [1]https://patchwork.freedesktop.org/series/113293/
>State:   failure
>Details: [2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113293v1/index.html
>
>     CI Bug Log - changes from CI_DRM_12630_full -> Patchwork_113293v1_full
>
>Summary
>
>   FAILURE
>
>   Serious unknown changes coming with Patchwork_113293v1_full absolutely
>   need to be
>   verified manually.
>
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_113293v1_full, please notify your bug team to
>   allow them
>   to document this new failure mode, which will reduce false positives in
>   CI.
>
>   External URL:
>   https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113293v1/index.html
>
>Participating hosts (13 -> 11)
>
>   Missing (2): pig-skl-6260u pig-kbl-iris
>
>Possible new issues
>
>   Here are the unknown changes that may have been introduced in
>   Patchwork_113293v1_full:
>
>  IGT changes
>
>    Possible regressions
>
>     * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
>
>          * shard-glk: [3]PASS -> [4]FAIL

Unrelated, since this patch is just dropping an error message, without 
any changes to code logic.

Umesh

>
>Known issues
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 922f1bb22dc6..f99bcc2113cb 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1584,11 +1584,8 @@  static u32 __cs_pending_mi_force_wakes(struct intel_engine_cs *engine)
 	};
 	u32 val;
 
-	if (!_reg[engine->id].reg) {
-		drm_err(&engine->i915->drm,
-			"MSG IDLE undefined for engine id %u\n", engine->id);
+	if (!_reg[engine->id].reg)
 		return 0;
-	}
 
 	val = intel_uncore_read(engine->uncore, _reg[engine->id]);