| Message ID | 20230127200550.3531984-1-robdclark@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Fix potential bit_17 double-free | expand |
On 27/01/2023 20:05, Rob Clark wrote: > From: Rob Clark <robdclark@chromium.org> > > A userspace with multiple threads racing I915_GEM_SET_TILING to set the > tiling to I915_TILING_NONE could trigger a double free of the bit_17 > bitmask. (Or conversely leak memory on the transition to tiled.) Move > allocation/free'ing of the bitmask within the section protected by the > obj lock. > > Fixes: e9b73c67390a ("drm/i915: Reduce memory pressure during shrinker by preallocating swizzle pages") Should be: Fixes: 2850748ef876 ("drm/i915: Pull i915_vma_pin under the vm->mutex") Before that commit there as a "BKL" (struct_mutex) aroung the call to i915_gem_object_set_tiling. Otherwise fix looks good: Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> I'll tweak the fixes tag and merge in a minute, thanks for the fix! Regards, Tvrtko > Signed-off-by: Rob Clark <robdclark@chromium.org> > --- > drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > index fd42b89b7162..bc21b1c2350a 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c > @@ -298,36 +298,37 @@ i915_gem_object_set_tiling(struct drm_i915_gem_object *obj, > vma->fence_alignment = > i915_gem_fence_alignment(i915, > vma->size, tiling, stride); > > if (vma->fence) > vma->fence->dirty = true; > } > spin_unlock(&obj->vma.lock); > > obj->tiling_and_stride = tiling | stride; > - i915_gem_object_unlock(obj); > - > - /* Force the fence to be reacquired for GTT access */ > - i915_gem_object_release_mmap_gtt(obj); > > /* Try to preallocate memory required to save swizzling on put-pages */ > if (i915_gem_object_needs_bit17_swizzle(obj)) { > if (!obj->bit_17) { > obj->bit_17 = bitmap_zalloc(obj->base.size >> PAGE_SHIFT, > GFP_KERNEL); > } > } else { > bitmap_free(obj->bit_17); > obj->bit_17 = NULL; > } > > + i915_gem_object_unlock(obj); > + > + /* Force the fence to be reacquired for GTT access */ > + i915_gem_object_release_mmap_gtt(obj); > + > return 0; > } > > /** > * i915_gem_set_tiling_ioctl - IOCTL handler to set tiling mode > * @dev: DRM device > * @data: data pointer for the ioctl > * @file: DRM file for the ioctl call > * > * Sets the tiling mode of an object, returning the required swizzling of
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c index fd42b89b7162..bc21b1c2350a 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c @@ -298,36 +298,37 @@ i915_gem_object_set_tiling(struct drm_i915_gem_object *obj, vma->fence_alignment = i915_gem_fence_alignment(i915, vma->size, tiling, stride); if (vma->fence) vma->fence->dirty = true; } spin_unlock(&obj->vma.lock); obj->tiling_and_stride = tiling | stride; - i915_gem_object_unlock(obj); - - /* Force the fence to be reacquired for GTT access */ - i915_gem_object_release_mmap_gtt(obj); /* Try to preallocate memory required to save swizzling on put-pages */ if (i915_gem_object_needs_bit17_swizzle(obj)) { if (!obj->bit_17) { obj->bit_17 = bitmap_zalloc(obj->base.size >> PAGE_SHIFT, GFP_KERNEL); } } else { bitmap_free(obj->bit_17); obj->bit_17 = NULL; } + i915_gem_object_unlock(obj); + + /* Force the fence to be reacquired for GTT access */ + i915_gem_object_release_mmap_gtt(obj); + return 0; } /** * i915_gem_set_tiling_ioctl - IOCTL handler to set tiling mode * @dev: DRM device * @data: data pointer for the ioctl * @file: DRM file for the ioctl call * * Sets the tiling mode of an object, returning the required swizzling of