@@ -142,16 +142,16 @@ void amdgpu_job_set_resources(struct amdgpu_job *job, struct amdgpu_bo *gds,
struct amdgpu_bo *gws, struct amdgpu_bo *oa)
{
if (gds) {
- job->gds_base = amdgpu_bo_gpu_offset(gds) >> PAGE_SHIFT;
- job->gds_size = amdgpu_bo_size(gds) >> PAGE_SHIFT;
+ job->gds_base = amdgpu_bo_gpu_offset(gds);
+ job->gds_size = amdgpu_bo_size(gds);
}
if (gws) {
- job->gws_base = amdgpu_bo_gpu_offset(gws) >> PAGE_SHIFT;
- job->gws_size = amdgpu_bo_size(gws) >> PAGE_SHIFT;
+ job->gws_base = amdgpu_bo_gpu_offset(gws);
+ job->gws_size = amdgpu_bo_size(gws);
}
if (oa) {
- job->oa_base = amdgpu_bo_gpu_offset(oa) >> PAGE_SHIFT;
- job->oa_size = amdgpu_bo_size(oa) >> PAGE_SHIFT;
+ job->oa_base = amdgpu_bo_gpu_offset(oa);
+ job->oa_size = amdgpu_bo_size(oa);
}
}
@@ -541,12 +541,11 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
/* GWS and OA don't need any alignment. */
page_align = bp->byte_align;
- size <<= PAGE_SHIFT;
} else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) {
/* Both size and alignment must be a multiple of 4. */
page_align = ALIGN(bp->byte_align, 4);
- size = ALIGN(size, 4) << PAGE_SHIFT;
+ size = ALIGN(size, 4);
} else {
/* Memory should be aligned at least to a page size. */
page_align = ALIGN(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
@@ -77,8 +77,7 @@ static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev,
unsigned int type,
uint64_t size)
{
- return ttm_range_man_init(&adev->mman.bdev, type,
- false, size << PAGE_SHIFT);
+ return ttm_range_man_init(&adev->mman.bdev, type, false, size);
}
/**