From patchwork Tue Mar 7 19:51:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Sousa X-Patchwork-Id: 13164663 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 767EBC6FD1E for ; Tue, 7 Mar 2023 19:51:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E5E4910E285; Tue, 7 Mar 2023 19:51:35 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7347910E285 for ; Tue, 7 Mar 2023 19:51:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678218693; x=1709754693; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=CuMv3oO0sOYbcdGi+fuudPIxc8/cgpJk7er2//+/rlY=; b=cNcjI9MsloN47I07DE4hxl8NRV4XqIzLbKahGKls9DGF4Z2N0tkXb+P6 abm49FZg4MtFhBane/adrhgtyzp/cnCZ+6XQ0mZOWcM6Weu9FRONnM/0k x2jEXrs/q/V562rquv0ec2LDYuV9jQhQQvcxH+wO0uO1psWvC1ik3egoc YU/b/xC3onLBmGK7Iwj9/PAOV9YeQkgzarP8M49cFOzzGwPJe5pYaBr4d xQDm06lKQUz6yuAmiknyvN+pGQDfmNH/M4MWFg17M7esdqEVabwMqP6K9 z1EK+2TVQI+54P9XP4k3PUWihuFKJiQLrNDXoWeYuLvHcCyou/6/Accx5 w==; X-IronPort-AV: E=McAfee;i="6500,9779,10642"; a="398533888" X-IronPort-AV: E=Sophos;i="5.98,241,1673942400"; d="scan'208";a="398533888" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2023 11:51:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10642"; a="800484866" X-IronPort-AV: E=Sophos;i="5.98,241,1673942400"; d="scan'208";a="800484866" Received: from ksriniva-mobl1.amr.corp.intel.com (HELO gjsousa-mobl2.intel.com) ([10.255.34.13]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2023 11:51:31 -0800 From: Gustavo Sousa To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Mar 2023 16:51:11 -0300 Message-Id: <20230307195111.90767-1-gustavo.sousa@intel.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2] drm/i915/dmc: Load DMC on MTL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matt Roper , Rodrigo Vivi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Madhumitha Tolakanahalli Pradeep Add support to load DMC on MTL. According to the spec and based on tests done on real hardware, 0x7000 is a reasonable size limit that covers each possible payload. v2: - Tighten payload size limit. (Matt, Rodrigo) - Use a better name for the defined payload limit. (Rodrigo) Signed-off-by: Madhumitha Tolakanahalli Pradeep Signed-off-by: Gustavo Sousa Cc: Rodrigo Vivi Cc: Matt Roper Cc: Anusha Srivatsa Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_dmc.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 6b162f77340e..d84cf9237b9c 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -89,10 +89,13 @@ static struct intel_dmc *i915_to_dmc(struct drm_i915_private *i915) __stringify(major) "_" \ __stringify(minor) ".bin" +#define XELPDP_DMC_MAX_FW_SIZE 0x7000 #define DISPLAY_VER13_DMC_MAX_FW_SIZE 0x20000 - #define DISPLAY_VER12_DMC_MAX_FW_SIZE ICL_DMC_MAX_FW_SIZE +#define MTL_DMC_PATH DMC_PATH(mtl) +MODULE_FIRMWARE(MTL_DMC_PATH); + #define DG2_DMC_PATH DMC_LEGACY_PATH(dg2, 2, 08) MODULE_FIRMWARE(DG2_DMC_PATH); @@ -979,7 +982,10 @@ void intel_dmc_init(struct drm_i915_private *i915) INIT_WORK(&dmc->work, dmc_load_work_fn); - if (IS_DG2(i915)) { + if (IS_METEORLAKE(i915)) { + dmc->fw_path = MTL_DMC_PATH; + dmc->max_fw_size = XELPDP_DMC_MAX_FW_SIZE; + } else if (IS_DG2(i915)) { dmc->fw_path = DG2_DMC_PATH; dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE; } else if (IS_ALDERLAKE_P(i915)) {