| Message ID | 20230324180253.4182375-1-umesh.nerlige.ramappa@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/mtl: Disable C6 on MTL A0 for media | expand |
On 3/24/2023 11:02 AM, Umesh Nerlige Ramappa wrote: > Earlier merge dropped an if block when applying the patch - > "drm/i915/mtl: Synchronize i915/BIOS on C6 enabling". Bring back the > if block as the check is required by - "drm/i915/mtl: Disable MC6 for MTL > A step" to disable C6 on media for A0 stepping. LGTM, Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > > Fixes: 3735040978a4 ("drm/i915/mtl: Synchronize i915/BIOS on C6 enabling") > Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_rc6.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c > index f760586f9f46..8f3cd68d14f8 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rc6.c > +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c > @@ -525,6 +525,13 @@ static bool rc6_supported(struct intel_rc6 *rc6) > return false; > } > > + if (IS_MTL_MEDIA_STEP(gt->i915, STEP_A0, STEP_B0) && > + gt->type == GT_MEDIA) { > + drm_notice(&i915->drm, > + "Media RC6 disabled on A step\n"); > + return false; > + } > + > return true; > } >
On Fri, Mar 24, 2023 at 06:43:19PM +0000, Patchwork wrote: > Patch Details > >Series: drm/i915/mtl: Disable C6 on MTL A0 for media >URL: [1]https://patchwork.freedesktop.org/series/115610/ >State: failure >Details: [2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115610v1/index.html > > CI Bug Log - changes from CI_DRM_12911 -> Patchwork_115610v1 > >Summary > > FAILURE > > Serious unknown changes coming with Patchwork_115610v1 absolutely need to > be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_115610v1, please notify your bug team to allow > them > to document this new failure mode, which will reduce false positives in > CI. > > External URL: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115610v1/index.html > >Participating hosts (37 -> 35) > > Missing (2): fi-tgl-1115g4 fi-snb-2520m > >Possible new issues > > Here are the unknown changes that may have been introduced in > Patchwork_115610v1: > > IGT changes > > Possible regressions > > * igt@i915_selftest@live@workarounds: > > * bat-rpls-1: [3]PASS -> [4]INCOMPLETE Patch is specific to MTL A0, so the above failure is not related to this change. Regards, Umesh > >Known issues
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c index f760586f9f46..8f3cd68d14f8 100644 --- a/drivers/gpu/drm/i915/gt/intel_rc6.c +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c @@ -525,6 +525,13 @@ static bool rc6_supported(struct intel_rc6 *rc6) return false; } + if (IS_MTL_MEDIA_STEP(gt->i915, STEP_A0, STEP_B0) && + gt->type == GT_MEDIA) { + drm_notice(&i915->drm, + "Media RC6 disabled on A step\n"); + return false; + } + return true; }
Earlier merge dropped an if block when applying the patch - "drm/i915/mtl: Synchronize i915/BIOS on C6 enabling". Bring back the if block as the check is required by - "drm/i915/mtl: Disable MC6 for MTL A step" to disable C6 on media for A0 stepping. Fixes: 3735040978a4 ("drm/i915/mtl: Synchronize i915/BIOS on C6 enabling") Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> --- drivers/gpu/drm/i915/gt/intel_rc6.c | 7 +++++++ 1 file changed, 7 insertions(+)