From patchwork Fri Mar 31 22:12:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Yacoub X-Patchwork-Id: 13196662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB7D8C76196 for ; Fri, 31 Mar 2023 22:13:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D62E910F31D; Fri, 31 Mar 2023 22:13:38 +0000 (UTC) Received: from mail-yb1-xb35.google.com (mail-yb1-xb35.google.com [IPv6:2607:f8b0:4864:20::b35]) by gabe.freedesktop.org (Postfix) with ESMTPS id CFCBD10F324 for ; Fri, 31 Mar 2023 22:12:27 +0000 (UTC) Received: by mail-yb1-xb35.google.com with SMTP id j7so29073613ybg.4 for ; Fri, 31 Mar 2023 15:12:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1680300747; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QQCW7qAlPoCanMOibyvaqreXBiUzfYEQ1+FdC/VaNrE=; b=BLvvTR2NCPvzRNBZZoGIZ3hzWnaS8cQouhgQLf6NorLhzUp1z4yXGygAwFflmH42mE Cje843BRgJtS+shb2nkKP8KLxs691CP0pPCanL4oyl5ODn3QD+8abYXozduHf0t+DZBV w8ET/tVCap4TTvInAg926pMpeFGnmRPMCA2kk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680300747; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QQCW7qAlPoCanMOibyvaqreXBiUzfYEQ1+FdC/VaNrE=; b=bNNhO3fhga8x6JJiV2j/zMeN1l2N5UfRd4wU/kDKf9eoZIvsmGkf8iaPUrNXlH+KEp zLnLCN/RMzgQKunbQWQhaF+jt2tGCiienKcaGsd+gms0ruAEw5edBs9MpzKWh93Q8iqJ HKy3QVVrU2Yqom6yoXdLcyYZfNdAh3zcIhDwG8pcVKFnzb5JF3AJe/fHsr8UtYv5RqyS Rd2rWlpEJVM4g8AOdpdGY5NHXCTJ6y2xNlcbm5lArcdBpX80YsLI7bfu7/CQOClkj9T4 PhU40+x5n6SVLhAuUq2/aX7Q3mUlISPdVsdbfJDhtHMaYio3xRHBCO10noW/JVvCbZTs SFsA== X-Gm-Message-State: AAQBX9foj4u6TxkD6tvPwMqc8kGJ7tO0WQNBP/g9CBjlChI8YX7AWAvb 1j/1Mw7KIFjyevmsol5VtuwrEg== X-Google-Smtp-Source: AKy350ZOc5RDf5J2kc0TLzAC0z0GmRU+8srPDqhPDFOpaoU5OD6YsojA+Uu6XHtS/F1APzWJLFI2UQ== X-Received: by 2002:a25:2392:0:b0:b73:ae6e:464 with SMTP id j140-20020a252392000000b00b73ae6e0464mr24928252ybj.21.1680300746791; Fri, 31 Mar 2023 15:12:26 -0700 (PDT) Received: from localhost ([2620:0:1035:15:a8f6:869a:3ef5:e1d]) by smtp.gmail.com with UTF8SMTPSA id t4-20020a817804000000b00545a0818493sm799378ywc.35.2023.03.31.15.12.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 31 Mar 2023 15:12:26 -0700 (PDT) From: Mark Yacoub X-Google-Original-From: Mark Yacoub To: Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Daniel Vetter Date: Fri, 31 Mar 2023 18:12:07 -0400 Message-Id: <20230331221213.1691997-6-markyacoub@google.com> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230331221213.1691997-1-markyacoub@google.com> References: <20230331221213.1691997-1-markyacoub@google.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v8 05/10] drm/i915/hdcp: Consolidate HDCP setup/state cache X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula , intel-gfx@lists.freedesktop.org, dianders@chromium.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, seanpaul@chromium.org, freedreno@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul Stick all of the setup for HDCP into a dedicated function. No functional change, but this will facilitate moving HDCP logic into helpers. Acked-by: Jani Nikula Reviewed-by: Rodrigo Vivi Change-Id: Ib358a503fa4520d072e477f708f1705b19f1c4fc Signed-off-by: Sean Paul --- Changes in v2: -None Changes in v3: -None Changes in v4: -None Changes in v5: -None Changes in v6: -None Changes in v7: - None Changes in v8: -None drivers/gpu/drm/i915/display/intel_hdcp.c | 52 +++++++++++++++-------- 1 file changed, 35 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 396d2cef000aa..0a20bc41be55d 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -2190,6 +2190,37 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder) } } +static int +_intel_hdcp_setup(struct intel_connector *connector, + const struct intel_crtc_state *pipe_config, u8 content_type) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct intel_hdcp *hdcp = &connector->hdcp; + int ret = 0; + + if (!connector->encoder) { + drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n", + connector->base.name, connector->base.base.id); + return -ENODEV; + } + + hdcp->content_type = content_type; + + if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) { + hdcp->cpu_transcoder = pipe_config->mst_master_transcoder; + hdcp->stream_transcoder = pipe_config->cpu_transcoder; + } else { + hdcp->cpu_transcoder = pipe_config->cpu_transcoder; + hdcp->stream_transcoder = INVALID_TRANSCODER; + } + + if (DISPLAY_VER(dev_priv) >= 12) + dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder); + + return ret; +} + static int initialize_hdcp_port_data(struct intel_connector *connector, struct intel_digital_port *dig_port, const struct intel_hdcp_shim *shim) @@ -2329,28 +2360,14 @@ int intel_hdcp_enable(struct intel_connector *connector, if (!hdcp->shim) return -ENOENT; - if (!connector->encoder) { - drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n", - connector->base.name, connector->base.base.id); - return -ENODEV; - } - mutex_lock(&hdcp->mutex); mutex_lock(&dig_port->hdcp_mutex); drm_WARN_ON(&dev_priv->drm, hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED); - hdcp->content_type = content_type; - - if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) { - hdcp->cpu_transcoder = pipe_config->mst_master_transcoder; - hdcp->stream_transcoder = pipe_config->cpu_transcoder; - } else { - hdcp->cpu_transcoder = pipe_config->cpu_transcoder; - hdcp->stream_transcoder = INVALID_TRANSCODER; - } - if (DISPLAY_VER(dev_priv) >= 12) - dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder); + ret = _intel_hdcp_setup(connector, pipe_config, content_type); + if (ret) + goto out; /* * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup @@ -2378,6 +2395,7 @@ int intel_hdcp_enable(struct intel_connector *connector, true); } +out: mutex_unlock(&dig_port->hdcp_mutex); mutex_unlock(&hdcp->mutex); return ret;