From patchwork Fri Jun 16 11:41:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bhadane, Dnyaneshwar" X-Patchwork-Id: 13282680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E45DDEB64DB for ; Fri, 16 Jun 2023 11:42:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 46AC110E5FF; Fri, 16 Jun 2023 11:42:18 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id A967F10E5F8 for ; Fri, 16 Jun 2023 11:42:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686915731; x=1718451731; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rViPlMGQBNfq535icMSNnHHZTRktRJ8gpyKwBdyP7to=; b=cyYBHxbMaGzzLpF87CtBZXsH9O1pkydQP+Dv5rBDTh6yJUL07pecoAV0 qw0oyI0xh799M+8r2tZ1Yk2SSwh4h8HGbq94XKgHomAfGjIQIF8V/dScq gZ2SaEFiK9x5gJ4ALmo9W4V7L3bNltYMw9DeWLU3gu+wY2IDl2iYgaCPl hrBXkPbZ+qG9bYwp8YNsRB1P+OhkYPxDE5Nk28bpeDcv87eJvGfzroh/g yVIbr/UKCDYyXWsM0ZmysxmTfBqypQ9R+wMV+MvA1A60s96/UPM+tZ31N rEwMfzIzbn1IkCWRBr92CBNJMPEEpzTGpFm29zDkKhVjZqO97HxmyTWnN Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="358067432" X-IronPort-AV: E=Sophos;i="6.00,247,1681196400"; d="scan'208";a="358067432" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jun 2023 04:42:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="742646269" X-IronPort-AV: E=Sophos;i="6.00,247,1681196400"; d="scan'208";a="742646269" Received: from pltuser2-ms-7d25.iind.intel.com ([10.190.239.58]) by orsmga008.jf.intel.com with ESMTP; 16 Jun 2023 04:42:10 -0700 From: Dnyaneshwar Bhadane To: intel-gfx@lists.freedesktop.org Date: Fri, 16 Jun 2023 17:11:52 +0530 Message-Id: <20230616114200.3228284-4-dnyaneshwar.bhadane@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230616114200.3228284-1-dnyaneshwar.bhadane@intel.com> References: <20230615095421.3135415-1-dnyaneshwar.bhadane@intel.com> <20230616114200.3228284-1-dnyaneshwar.bhadane@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 03/11] drm/i915/tgl: s/RKL/ROCKETLAKE for platform/subplatform defines X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dnyaneshwar Bhadane Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Follow consistent naming convention. Replace RKL with ROCKETLAKE. Signed-off-by: Dnyaneshwar Bhadane --- drivers/gpu/drm/i915/display/intel_display_power.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index db5437043904..c65505b82065 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -1586,7 +1586,7 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv) return; if (IS_ALDERLAKE_S(dev_priv) || - IS_RKL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0)) + IS_ROCKETLAKE_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0)) /* Wa_1409767108 */ table = wa_1409767108_buddy_page_masks; else diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6102b127fe4d..feddd9d32dce 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -666,7 +666,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, (IS_TIGERLAKE(__i915) && \ IS_DISPLAY_STEP(__i915, since, until)) -#define IS_RKL_DISPLAY_STEP(p, since, until) \ +#define IS_ROCKETLAKE_DISPLAY_STEP(p, since, until) \ (IS_ROCKETLAKE(p) && IS_DISPLAY_STEP(p, since, until)) #define IS_ADLS_DISPLAY_STEP(__i915, since, until) \