| Message ID | 20230710134317.2794177-2-chaitanya.kumar.borah@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MTL Degamma implementation | expand |
> -----Original Message----- > From: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com> > Sent: Monday, July 10, 2023 7:13 PM > To: intel-gfx@lists.freedesktop.org > Cc: jani.nikula@linux.intel.com; Shankar, Uma <uma.shankar@intel.com>; Borah, > Chaitanya Kumar <chaitanya.kumar.borah@intel.com> > Subject: [PATCH v2 1/2] drm/i915/color: Upscale degamma values for MTL > > MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from > 16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16 bit > precision. Until a new uapi comes along to support higher bitdepth, upscale the > values sent from userland to 24 bit before writing into the HW to continue > supporting degamma on MTL. > > Add helper function to upscale or downscale lut values. Parameters 'to' and 'from' > needs to be less than 32. This should be sufficient as currently there are no lut values > exceeding 32 bit. > > v2: (Jani) > - Reuse glk_load_degamma_lut() > - Create a helper function for upscaling values > > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> > --- > drivers/gpu/drm/i915/display/intel_color.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c > b/drivers/gpu/drm/i915/display/intel_color.c > index 8966e6560516..15ada7fada96 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.c > +++ b/drivers/gpu/drm/i915/display/intel_color.c > @@ -1453,6 +1453,16 @@ static int glk_degamma_lut_size(struct drm_i915_private > *i915) > return 35; > } > > +/* change_lut_val_precision: helper function to upscale or downscale lut values. Fix multi line comment style. Change looks ok to me given the limitations of the UAPI. Reviewed-by: Uma Shankar <uma.shankar@intel.com> > + * Parameters 'to' and 'from' needs to be less than 32. This should be > +sufficient > + * as currently there are no lut values exceeding 32 bit. > + **/ > + > +static u32 change_lut_val_precision(u32 lut_val, int to, int from) { > + return mul_u32_u32(lut_val, (1 << to)) / (1 << from); } > + > static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state, > const struct drm_property_blob *blob) { @@ - > 1487,8 +1497,15 @@ static void glk_load_degamma_lut(const struct > intel_crtc_state *crtc_state, > * ToDo: Extend to max 7.0. Enable 32 bit input value > * as compared to just 16 to achieve this. > */ > + u32 lut_val; > + > + if (DISPLAY_VER(i915) >= 14) > + lut_val = change_lut_val_precision(lut[i].green, 24, 16); > + else > + lut_val = lut[i].green; > + > ilk_lut_write(crtc_state, PRE_CSC_GAMC_DATA(pipe), > - lut[i].green); > + lut_val); > } > > /* Clamp values > 1.0. */ > -- > 2.25.1
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 8966e6560516..15ada7fada96 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -1453,6 +1453,16 @@ static int glk_degamma_lut_size(struct drm_i915_private *i915) return 35; } +/* change_lut_val_precision: helper function to upscale or downscale lut values. + * Parameters 'to' and 'from' needs to be less than 32. This should be sufficient + * as currently there are no lut values exceeding 32 bit. + **/ + +static u32 change_lut_val_precision(u32 lut_val, int to, int from) +{ + return mul_u32_u32(lut_val, (1 << to)) / (1 << from); +} + static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state, const struct drm_property_blob *blob) { @@ -1487,8 +1497,15 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state, * ToDo: Extend to max 7.0. Enable 32 bit input value * as compared to just 16 to achieve this. */ + u32 lut_val; + + if (DISPLAY_VER(i915) >= 14) + lut_val = change_lut_val_precision(lut[i].green, 24, 16); + else + lut_val = lut[i].green; + ilk_lut_write(crtc_state, PRE_CSC_GAMC_DATA(pipe), - lut[i].green); + lut_val); } /* Clamp values > 1.0. */
MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from 16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16 bit precision. Until a new uapi comes along to support higher bitdepth, upscale the values sent from userland to 24 bit before writing into the HW to continue supporting degamma on MTL. Add helper function to upscale or downscale lut values. Parameters 'to' and 'from' needs to be less than 32. This should be sufficient as currently there are no lut values exceeding 32 bit. v2: (Jani) - Reuse glk_load_degamma_lut() - Create a helper function for upscaling values Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> --- drivers/gpu/drm/i915/display/intel_color.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)