| Message ID | 20230719132822.305612-5-luciano.coelho@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/tc: some clean-ups in max lane count handling code | expand |
Hi Luca,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-tip/drm-tip]
url: https://github.com/intel-lab-lkp/linux/commits/Luca-Coelho/drm-i915-tc-rename-mtl_tc_port_get_pin_assignment_mask/20230719-213204
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link: https://lore.kernel.org/r/20230719132822.305612-5-luciano.coelho%40intel.com
patch subject: [Intel-gfx] [PATCH 4/4] drm/i915/tc: remove "fia" from intel_tc_port_fia_max_lane_count()
config: x86_64-defconfig (https://download.01.org/0day-ci/archive/20230719/202307192336.hHukzc8N-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce: (https://download.01.org/0day-ci/archive/20230719/202307192336.hHukzc8N-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202307192336.hHukzc8N-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/display/intel_cx0_phy.c: In function 'intel_cx0_phy_lane_reset':
>> drivers/gpu/drm/i915/display/intel_cx0_phy.c:2537:28: error: implicit declaration of function 'intel_tc_port_fia_max_lane_count'; did you mean 'intel_tc_port_max_lane_count'? [-Werror=implicit-function-declaration]
2537 | bool both_lanes = intel_tc_port_fia_max_lane_count(enc_to_dig_port(encoder)) > 2;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| intel_tc_port_max_lane_count
cc1: all warnings being treated as errors
vim +2537 drivers/gpu/drm/i915/display/intel_cx0_phy.c
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2530
619a06dba6fa38 Mika Kahola 2023-06-01 2531 static void intel_cx0_phy_lane_reset(struct drm_i915_private *i915,
619a06dba6fa38 Mika Kahola 2023-06-01 2532 struct intel_encoder *encoder,
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2533 bool lane_reversal)
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2534 {
619a06dba6fa38 Mika Kahola 2023-06-01 2535 enum port port = encoder->port;
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2536 enum phy phy = intel_port_to_phy(i915, port);
619a06dba6fa38 Mika Kahola 2023-06-01 @2537 bool both_lanes = intel_tc_port_fia_max_lane_count(enc_to_dig_port(encoder)) > 2;
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2538 u8 lane_mask = lane_reversal ? INTEL_CX0_LANE1 :
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2539 INTEL_CX0_LANE0;
619a06dba6fa38 Mika Kahola 2023-06-01 2540 u32 lane_pipe_reset = both_lanes ?
619a06dba6fa38 Mika Kahola 2023-06-01 2541 XELPDP_LANE_PIPE_RESET(0) |
619a06dba6fa38 Mika Kahola 2023-06-01 2542 XELPDP_LANE_PIPE_RESET(1) :
619a06dba6fa38 Mika Kahola 2023-06-01 2543 XELPDP_LANE_PIPE_RESET(0);
619a06dba6fa38 Mika Kahola 2023-06-01 2544 u32 lane_phy_current_status = both_lanes ?
619a06dba6fa38 Mika Kahola 2023-06-01 2545 XELPDP_LANE_PHY_CURRENT_STATUS(0) |
619a06dba6fa38 Mika Kahola 2023-06-01 2546 XELPDP_LANE_PHY_CURRENT_STATUS(1) :
619a06dba6fa38 Mika Kahola 2023-06-01 2547 XELPDP_LANE_PHY_CURRENT_STATUS(0);
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2548
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2549 if (__intel_de_wait_for_register(i915, XELPDP_PORT_BUF_CTL1(port),
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2550 XELPDP_PORT_BUF_SOC_PHY_READY,
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2551 XELPDP_PORT_BUF_SOC_PHY_READY,
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2552 XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US, 0, NULL))
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2553 drm_warn(&i915->drm, "PHY %c failed to bring out of SOC reset after %dus.\n",
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2554 phy_name(phy), XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US);
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2555
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2556 intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(port),
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2557 XELPDP_LANE_PIPE_RESET(0) | XELPDP_LANE_PIPE_RESET(1),
619a06dba6fa38 Mika Kahola 2023-06-01 2558 lane_pipe_reset);
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2559
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2560 if (__intel_de_wait_for_register(i915, XELPDP_PORT_BUF_CTL2(port),
619a06dba6fa38 Mika Kahola 2023-06-01 2561 lane_phy_current_status, lane_phy_current_status,
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2562 XELPDP_PORT_RESET_START_TIMEOUT_US, 0, NULL))
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2563 drm_warn(&i915->drm, "PHY %c failed to bring out of Lane reset after %dus.\n",
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2564 phy_name(phy), XELPDP_PORT_RESET_START_TIMEOUT_US);
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2565
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2566 intel_de_rmw(i915, XELPDP_PORT_CLOCK_CTL(port),
619a06dba6fa38 Mika Kahola 2023-06-01 2567 intel_cx0_get_pclk_refclk_request(both_lanes ?
619a06dba6fa38 Mika Kahola 2023-06-01 2568 INTEL_CX0_BOTH_LANES :
619a06dba6fa38 Mika Kahola 2023-06-01 2569 INTEL_CX0_LANE0),
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2570 intel_cx0_get_pclk_refclk_request(lane_mask));
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2571
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2572 if (__intel_de_wait_for_register(i915, XELPDP_PORT_CLOCK_CTL(port),
619a06dba6fa38 Mika Kahola 2023-06-01 2573 intel_cx0_get_pclk_refclk_ack(both_lanes ?
619a06dba6fa38 Mika Kahola 2023-06-01 2574 INTEL_CX0_BOTH_LANES :
619a06dba6fa38 Mika Kahola 2023-06-01 2575 INTEL_CX0_LANE0),
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2576 intel_cx0_get_pclk_refclk_ack(lane_mask),
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2577 XELPDP_REFCLK_ENABLE_TIMEOUT_US, 0, NULL))
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2578 drm_warn(&i915->drm, "PHY %c failed to request refclk after %dus.\n",
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2579 phy_name(phy), XELPDP_REFCLK_ENABLE_TIMEOUT_US);
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2580
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2581 intel_cx0_powerdown_change_sequence(i915, port, INTEL_CX0_BOTH_LANES,
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2582 CX0_P2_STATE_RESET);
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2583 intel_cx0_setup_powerdown(i915, port);
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2584
619a06dba6fa38 Mika Kahola 2023-06-01 2585 intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(port), lane_pipe_reset, 0);
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2586
619a06dba6fa38 Mika Kahola 2023-06-01 2587 if (intel_de_wait_for_clear(i915, XELPDP_PORT_BUF_CTL2(port), lane_phy_current_status,
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2588 XELPDP_PORT_RESET_END_TIMEOUT))
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2589 drm_warn(&i915->drm, "PHY %c failed to bring out of Lane reset after %dms.\n",
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2590 phy_name(phy), XELPDP_PORT_RESET_END_TIMEOUT);
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2591 }
51390cc0e00a37 Radhakrishna Sripada 2023-04-13 2592
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 03675620e3ea..b974af839acb 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -306,13 +306,13 @@ static int intel_dp_max_common_lane_count(struct intel_dp *intel_dp) struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); int source_max = intel_dp_max_source_lane_count(dig_port); int sink_max = intel_dp->max_sink_lane_count; - int fia_max = intel_tc_port_fia_max_lane_count(dig_port); + int port_max = intel_tc_port_max_lane_count(dig_port); int lttpr_max = drm_dp_lttpr_max_lane_count(intel_dp->lttpr_common_caps); if (lttpr_max) sink_max = min(sink_max, lttpr_max); - return min3(source_max, sink_max, fia_max); + return min3(source_max, sink_max, port_max); } int intel_dp_max_lane_count(struct intel_dp *intel_dp) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 11b6139eaf4f..61de3dfb89bd 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -347,7 +347,7 @@ static int intel_tc_port_get_max_lane_count(struct intel_digital_port *dig_port) } } -int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port) +int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); @@ -595,7 +595,7 @@ static bool tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port *tc, struct intel_digital_port *dig_port = tc->dig_port; int max_lanes; - max_lanes = intel_tc_port_fia_max_lane_count(dig_port); + max_lanes = intel_tc_port_max_lane_count(dig_port); if (tc->mode == TC_PORT_LEGACY) { drm_WARN_ON(&i915->drm, max_lanes != 4); return true; diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h index ffc0e2a74e43..80a61e52850e 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.h +++ b/drivers/gpu/drm/i915/display/intel_tc.h @@ -20,7 +20,7 @@ bool intel_tc_port_connected(struct intel_encoder *encoder); bool intel_tc_port_connected_locked(struct intel_encoder *encoder); u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port); -int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port); +int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port); void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port, int required_lanes);
It is irrelevant for the caller that the max lane count is being derived from a FIA register, so having "fia" in the function name is irrelevant. Rename the function accordingly. Signed-off-by: Luca Coelho <luciano.coelho@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 4 ++-- drivers/gpu/drm/i915/display/intel_tc.c | 4 ++-- drivers/gpu/drm/i915/display/intel_tc.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-)