diff mbox series

[v3,4/4] drm/i915/tc: remove "fia" from intel_tc_port_fia_max_lane_count()

Message ID 20230721111121.369227-5-luciano.coelho@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/tc: some clean-ups in max lane count handling code | expand

Commit Message

Luca Coelho July 21, 2023, 11:11 a.m. UTC 
It is irrelevant for the caller that the max lane count is being
derived from a FIA register, so having "fia" in the function name is
irrelevant.  Rename the function accordingly.

Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cx0_phy.c | 2 +-
 drivers/gpu/drm/i915/display/intel_dp.c      | 4 ++--
 drivers/gpu/drm/i915/display/intel_tc.c      | 4 ++--
 drivers/gpu/drm/i915/display/intel_tc.h      | 2 +-
 4 files changed, 6 insertions(+), 6 deletions(-)

Comments

Lucas De Marchi Aug. 19, 2023, 3:53 a.m. UTC | #1 
On Fri, Jul 21, 2023 at 02:11:21PM +0300, Luca Coelho wrote:
>It is irrelevant for the caller that the max lane count is being
>derived from a FIA register, so having "fia" in the function name is
>irrelevant.  Rename the function accordingly.
>
>Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c      | 4 ++--
> drivers/gpu/drm/i915/display/intel_tc.c      | 4 ++--
> drivers/gpu/drm/i915/display/intel_tc.h      | 2 +-
> 4 files changed, 6 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>index 1b00ef2c6185..6d4f7b20ce85 100644
>--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>@@ -2534,7 +2534,7 @@ static void intel_cx0_phy_lane_reset(struct drm_i915_private *i915,
> {
> 	enum port port = encoder->port;
> 	enum phy phy = intel_port_to_phy(i915, port);
>-	bool both_lanes =  intel_tc_port_fia_max_lane_count(enc_to_dig_port(encoder)) > 2;
>+	bool both_lanes =  intel_tc_port_max_lane_count(enc_to_dig_port(encoder)) > 2;
> 	u8 lane_mask = lane_reversal ? INTEL_CX0_LANE1 :
> 				  INTEL_CX0_LANE0;
> 	u32 lane_pipe_reset = both_lanes ?
>diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>index 03675620e3ea..b974af839acb 100644
>--- a/drivers/gpu/drm/i915/display/intel_dp.c
>+++ b/drivers/gpu/drm/i915/display/intel_dp.c
>@@ -306,13 +306,13 @@ static int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
> 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> 	int source_max = intel_dp_max_source_lane_count(dig_port);
> 	int sink_max = intel_dp->max_sink_lane_count;
>-	int fia_max = intel_tc_port_fia_max_lane_count(dig_port);
>+	int port_max = intel_tc_port_max_lane_count(dig_port);

s/port/lane/?  since this is the lane max that is being returned, not
the port_max... ?

> 	int lttpr_max = drm_dp_lttpr_max_lane_count(intel_dp->lttpr_common_caps);
>
> 	if (lttpr_max)
> 		sink_max = min(sink_max, lttpr_max);
>
>-	return min3(source_max, sink_max, fia_max);
>+	return min3(source_max, sink_max, port_max);
> }
>
> int intel_dp_max_lane_count(struct intel_dp *intel_dp)
>diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
>index 43b8eeba26f8..3c94bbcb5497 100644
>--- a/drivers/gpu/drm/i915/display/intel_tc.c
>+++ b/drivers/gpu/drm/i915/display/intel_tc.c
>@@ -337,7 +337,7 @@ static int intel_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
> 	}
> }
>
>-int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
>+int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port)
> {
> 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> 	struct intel_tc_port *tc = to_tc_port(dig_port);
>@@ -589,7 +589,7 @@ static bool tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port *tc,
> 	struct intel_digital_port *dig_port = tc->dig_port;
> 	int max_lanes;
>
>-	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
>+	max_lanes = intel_tc_port_max_lane_count(dig_port);

as shown here 

with that var rename:


	Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

thanks
Lucas De Marchi

> 	if (tc->mode == TC_PORT_LEGACY) {
> 		drm_WARN_ON(&i915->drm, max_lanes != 4);
> 		return true;
>diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
>index ffc0e2a74e43..80a61e52850e 100644
>--- a/drivers/gpu/drm/i915/display/intel_tc.h
>+++ b/drivers/gpu/drm/i915/display/intel_tc.h
>@@ -20,7 +20,7 @@ bool intel_tc_port_connected(struct intel_encoder *encoder);
> bool intel_tc_port_connected_locked(struct intel_encoder *encoder);
>
> u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port);
>-int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port);
>+int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port);
> void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
> 				      int required_lanes);
>
>-- 
>2.39.2
>
Kandpal, Suraj Aug. 24, 2023, 5:45 a.m. UTC | #2 
> It is irrelevant for the caller that the max lane count is being derived from a FIA
> register, so having "fia" in the function name is irrelevant.  Rename the
> function accordingly.
> 
> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>

LGTM.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cx0_phy.c | 2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c      | 4 ++--
>  drivers/gpu/drm/i915/display/intel_tc.c      | 4 ++--
>  drivers/gpu/drm/i915/display/intel_tc.h      | 2 +-
>  4 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> index 1b00ef2c6185..6d4f7b20ce85 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> @@ -2534,7 +2534,7 @@ static void intel_cx0_phy_lane_reset(struct
> drm_i915_private *i915,  {
>  	enum port port = encoder->port;
>  	enum phy phy = intel_port_to_phy(i915, port);
> -	bool both_lanes =
> intel_tc_port_fia_max_lane_count(enc_to_dig_port(encoder)) > 2;
> +	bool both_lanes =
> +intel_tc_port_max_lane_count(enc_to_dig_port(encoder)) > 2;
>  	u8 lane_mask = lane_reversal ? INTEL_CX0_LANE1 :
>  				  INTEL_CX0_LANE0;
>  	u32 lane_pipe_reset = both_lanes ?
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 03675620e3ea..b974af839acb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -306,13 +306,13 @@ static int
> intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  	int source_max = intel_dp_max_source_lane_count(dig_port);
>  	int sink_max = intel_dp->max_sink_lane_count;
> -	int fia_max = intel_tc_port_fia_max_lane_count(dig_port);
> +	int port_max = intel_tc_port_max_lane_count(dig_port);
>  	int lttpr_max = drm_dp_lttpr_max_lane_count(intel_dp-
> >lttpr_common_caps);
> 
>  	if (lttpr_max)
>  		sink_max = min(sink_max, lttpr_max);
> 
> -	return min3(source_max, sink_max, fia_max);
> +	return min3(source_max, sink_max, port_max);
>  }
> 
>  int intel_dp_max_lane_count(struct intel_dp *intel_dp) diff --git
> a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 43b8eeba26f8..3c94bbcb5497 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -337,7 +337,7 @@ static int intel_tc_port_get_max_lane_count(struct
> intel_digital_port *dig_port)
>  	}
>  }
> 
> -int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
> +int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port)
>  {
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	struct intel_tc_port *tc = to_tc_port(dig_port); @@ -589,7 +589,7
> @@ static bool tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port
> *tc,
>  	struct intel_digital_port *dig_port = tc->dig_port;
>  	int max_lanes;
> 
> -	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
> +	max_lanes = intel_tc_port_max_lane_count(dig_port);
>  	if (tc->mode == TC_PORT_LEGACY) {
>  		drm_WARN_ON(&i915->drm, max_lanes != 4);
>  		return true;
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.h
> b/drivers/gpu/drm/i915/display/intel_tc.h
> index ffc0e2a74e43..80a61e52850e 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.h
> +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> @@ -20,7 +20,7 @@ bool intel_tc_port_connected(struct intel_encoder
> *encoder);  bool intel_tc_port_connected_locked(struct intel_encoder
> *encoder);
> 
>  u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port
> *dig_port); -int intel_tc_port_fia_max_lane_count(struct intel_digital_port
> *dig_port);
> +int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port);
>  void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
>  				      int required_lanes);
> 
> --
> 2.39.2
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 1b00ef2c6185..6d4f7b20ce85 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2534,7 +2534,7 @@  static void intel_cx0_phy_lane_reset(struct drm_i915_private *i915,
 {
 	enum port port = encoder->port;
 	enum phy phy = intel_port_to_phy(i915, port);
-	bool both_lanes =  intel_tc_port_fia_max_lane_count(enc_to_dig_port(encoder)) > 2;
+	bool both_lanes =  intel_tc_port_max_lane_count(enc_to_dig_port(encoder)) > 2;
 	u8 lane_mask = lane_reversal ? INTEL_CX0_LANE1 :
 				  INTEL_CX0_LANE0;
 	u32 lane_pipe_reset = both_lanes ?
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 03675620e3ea..b974af839acb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -306,13 +306,13 @@  static int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 	int source_max = intel_dp_max_source_lane_count(dig_port);
 	int sink_max = intel_dp->max_sink_lane_count;
-	int fia_max = intel_tc_port_fia_max_lane_count(dig_port);
+	int port_max = intel_tc_port_max_lane_count(dig_port);
 	int lttpr_max = drm_dp_lttpr_max_lane_count(intel_dp->lttpr_common_caps);
 
 	if (lttpr_max)
 		sink_max = min(sink_max, lttpr_max);
 
-	return min3(source_max, sink_max, fia_max);
+	return min3(source_max, sink_max, port_max);
 }
 
 int intel_dp_max_lane_count(struct intel_dp *intel_dp)
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 43b8eeba26f8..3c94bbcb5497 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -337,7 +337,7 @@  static int intel_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
 	}
 }
 
-int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
+int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	struct intel_tc_port *tc = to_tc_port(dig_port);
@@ -589,7 +589,7 @@  static bool tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port *tc,
 	struct intel_digital_port *dig_port = tc->dig_port;
 	int max_lanes;
 
-	max_lanes = intel_tc_port_fia_max_lane_count(dig_port);
+	max_lanes = intel_tc_port_max_lane_count(dig_port);
 	if (tc->mode == TC_PORT_LEGACY) {
 		drm_WARN_ON(&i915->drm, max_lanes != 4);
 		return true;
diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
index ffc0e2a74e43..80a61e52850e 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.h
+++ b/drivers/gpu/drm/i915/display/intel_tc.h
@@ -20,7 +20,7 @@  bool intel_tc_port_connected(struct intel_encoder *encoder);
 bool intel_tc_port_connected_locked(struct intel_encoder *encoder);
 
 u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port);
-int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port);
+int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port);
 void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
 				      int required_lanes);