diff mbox series

[24/42] drm/i915/display: Remove FBC capability from fused off pipes

Message ID 20230823170740.1180212-25-lucas.demarchi@intel.com (mailing list archive)
State New, archived
Headers show
Series Enable Lunar Lake display | expand

Commit Message

Lucas De Marchi Aug. 23, 2023, 5:07 p.m. UTC
From: Clint Taylor <clinton.a.taylor@intel.com>

If a particular pipe is disabled by fuse also remove the FBC for that
pipe.

Bspec: 69464
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Matt Roper Aug. 23, 2023, 7:53 p.m. UTC | #1
On Wed, Aug 23, 2023 at 10:07:22AM -0700, Lucas De Marchi wrote:
> From: Clint Taylor <clinton.a.taylor@intel.com>
> 
> If a particular pipe is disabled by fuse also remove the FBC for that
> pipe.
> 
> Bspec: 69464
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Gustavo Sousa <gustavo.sousa@intel.com>
> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display_device.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index b853cd0c704a..c4ff5a08c269 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -962,16 +962,19 @@ void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
>  		if (dfsm & SKL_DFSM_PIPE_B_DISABLE) {
>  			display_runtime->pipe_mask &= ~BIT(PIPE_B);
>  			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_B);
> +			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_B);
>  		}
>  		if (dfsm & SKL_DFSM_PIPE_C_DISABLE) {
>  			display_runtime->pipe_mask &= ~BIT(PIPE_C);
>  			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
> +			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_C);
>  		}
>  
>  		if (DISPLAY_VER(i915) >= 12 &&
>  		    (dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
>  			display_runtime->pipe_mask &= ~BIT(PIPE_D);
>  			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_D);
> +			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_D);
>  		}
>  
>  		if (!display_runtime->pipe_mask)
> -- 
> 2.40.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index b853cd0c704a..c4ff5a08c269 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -962,16 +962,19 @@  void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
 		if (dfsm & SKL_DFSM_PIPE_B_DISABLE) {
 			display_runtime->pipe_mask &= ~BIT(PIPE_B);
 			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_B);
+			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_B);
 		}
 		if (dfsm & SKL_DFSM_PIPE_C_DISABLE) {
 			display_runtime->pipe_mask &= ~BIT(PIPE_C);
 			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
+			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_C);
 		}
 
 		if (DISPLAY_VER(i915) >= 12 &&
 		    (dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
 			display_runtime->pipe_mask &= ~BIT(PIPE_D);
 			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_D);
+			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_D);
 		}
 
 		if (!display_runtime->pipe_mask)