| Message ID | 20230823170740.1180212-41-lucas.demarchi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable Lunar Lake display | expand |
On Wed, Aug 23, 2023 at 10:07:38AM -0700, Lucas De Marchi wrote: > From: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com> > > Add support to check c10 phy link rate for LNL in > intel_c10_phy_check_hdmi_link_rate() function. If it turns out the LNL tables from the previous patch aren't necessary, then we should be able to drop this one as well. Matt > > BSpec: 68862 > Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> > --- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > index c8da6985c179..d9c43f3b4f34 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > @@ -2137,11 +2137,16 @@ static const struct intel_c20pll_state * const mtl_c20_hdmi_tables[] = { > NULL, > }; > > -static int intel_c10_phy_check_hdmi_link_rate(int clock) > +static int intel_c10_phy_check_hdmi_link_rate(struct drm_i915_private *i915, int clock) > { > - const struct intel_c10pll_state * const *tables = mtl_c10_hdmi_tables; > + const struct intel_c10pll_state * const *tables; > int i; > > + if (DISPLAY_VER(i915) >= 20) > + tables = lnl_c10_hdmi_tables; > + else > + tables = mtl_c10_hdmi_tables; > + > for (i = 0; tables[i]; i++) { > if (clock == tables[i]->clock) > return MODE_OK; > @@ -2414,7 +2419,7 @@ int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock) > enum phy phy = intel_port_to_phy(i915, dig_port->base.port); > > if (intel_is_c10phy(i915, phy)) > - return intel_c10_phy_check_hdmi_link_rate(clock); > + return intel_c10_phy_check_hdmi_link_rate(i915, clock); > return intel_c20_phy_check_hdmi_link_rate(clock); > } > > -- > 2.40.1 >
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index c8da6985c179..d9c43f3b4f34 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -2137,11 +2137,16 @@ static const struct intel_c20pll_state * const mtl_c20_hdmi_tables[] = { NULL, }; -static int intel_c10_phy_check_hdmi_link_rate(int clock) +static int intel_c10_phy_check_hdmi_link_rate(struct drm_i915_private *i915, int clock) { - const struct intel_c10pll_state * const *tables = mtl_c10_hdmi_tables; + const struct intel_c10pll_state * const *tables; int i; + if (DISPLAY_VER(i915) >= 20) + tables = lnl_c10_hdmi_tables; + else + tables = mtl_c10_hdmi_tables; + for (i = 0; tables[i]; i++) { if (clock == tables[i]->clock) return MODE_OK; @@ -2414,7 +2419,7 @@ int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock) enum phy phy = intel_port_to_phy(i915, dig_port->base.port); if (intel_is_c10phy(i915, phy)) - return intel_c10_phy_check_hdmi_link_rate(clock); + return intel_c10_phy_check_hdmi_link_rate(i915, clock); return intel_c20_phy_check_hdmi_link_rate(clock); }