diff mbox series

[2/2] drm/i915/display/vrr: Update VRR parameters in fastset

Message ID 20230825161129.2811298-2-navaremanasi@chromium.org (mailing list archive)
State New, archived
Headers show
Series [1/2] drm/i915/display: Allow VRR parameters mismatch in case of dual refresh rate fastset | expand

Commit Message

Manasi Navare Aug. 25, 2023, 4:11 p.m. UTC 
In Seamless refresh rate switching when we throttle refresh rate
VRR parameters get updated.
Update these in fastset in update_crtc() hook before enabling VRR
so that the VRR range now reflects the throttled refresh rate
correctly.

This has been tested for Dual refresh rate + VRR use cases
together.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9154
Cc: Drew Davenport <ddavenport@chromium.org>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Manasi Navare <navaremanasi@chromium.org>
---
 drivers/gpu/drm/i915/display/intel_display.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 26d3d2fe0485..cec3912d14fb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -925,6 +925,16 @@  static bool vrr_disabling(const struct intel_crtc_state *old_crtc_state,
 	return is_disabling(vrr.enable, old_crtc_state, new_crtc_state);
 }
 
+static bool vrr_params_changed(const struct intel_crtc_state *old_crtc_state,
+			       const struct intel_crtc_state *new_crtc_state)
+{
+	return (old_crtc_state->vrr.flipline != new_crtc_state->vrr.flipline ||
+		old_crtc_state->vrr.vmin != new_crtc_state->vrr.vmin ||
+		old_crtc_state->vrr.vmax != new_crtc_state->vrr.vmax ||
+		old_crtc_state->vrr.guardband != new_crtc_state->vrr.guardband ||
+		old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full);
+}
+
 #undef is_disabling
 #undef is_enabling
 
@@ -6570,6 +6580,7 @@  static void intel_update_crtc(struct intel_atomic_state *state,
 	struct intel_crtc_state *new_crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
 	bool modeset = intel_crtc_needs_modeset(new_crtc_state);
+	bool vrr_update_in_seamless_m_n;
 
 	if (old_crtc_state->inherited ||
 	    intel_crtc_needs_modeset(new_crtc_state)) {
@@ -6577,7 +6588,14 @@  static void intel_update_crtc(struct intel_atomic_state *state,
 			intel_dpt_configure(crtc);
 	}
 
-	if (vrr_enabling(old_crtc_state, new_crtc_state)) {
+	if (!modeset && new_crtc_state->seamless_m_n &&
+	    vrr_params_changed(old_crtc_state, new_crtc_state)) {
+		intel_vrr_set_transcoder_timings(new_crtc_state);
+		vrr_update_in_seamless_m_n = true;
+	}
+
+	if (vrr_enabling(old_crtc_state, new_crtc_state) ||
+	    vrr_update_in_seamless_m_n) {
 		intel_vrr_enable(new_crtc_state);
 		intel_crtc_update_active_timings(new_crtc_state,
 						 new_crtc_state->vrr.enable);