diff mbox series

[v2,14/27] drm/i915/display: Remove FBC capability from fused off pipes

Message ID 20230907153757.2249452-15-lucas.demarchi@intel.com (mailing list archive)
State New, archived
Headers show
Series Enable Lunar Lake display | expand

Commit Message

Lucas De Marchi Sept. 7, 2023, 3:37 p.m. UTC 
From: Clint Taylor <clinton.a.taylor@intel.com>

If a particular pipe is disabled by fuse also remove the FBC for that
pipe.

Bspec: 69464
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Vinod Govindapillai Sept. 8, 2023, 8:55 a.m. UTC | #1 
On Thu, 2023-09-07 at 08:37 -0700, Lucas De Marchi wrote:
> From: Clint Taylor <clinton.a.taylor@intel.com>
> 
> If a particular pipe is disabled by fuse also remove the FBC for that
> pipe.
> 
> Bspec: 69464
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Gustavo Sousa <gustavo.sousa@intel.com>
> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.c | 3 +++
>  1 file changed, 3 insertions(+)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 652e35ed7789..dc6cbd8bb31d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1024,16 +1024,19 @@ void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
>                 if (dfsm & SKL_DFSM_PIPE_B_DISABLE) {
>                         display_runtime->pipe_mask &= ~BIT(PIPE_B);
>                         display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_B);
> +                       display_runtime->fbc_mask &= ~BIT(INTEL_FBC_B);
>                 }
>                 if (dfsm & SKL_DFSM_PIPE_C_DISABLE) {
>                         display_runtime->pipe_mask &= ~BIT(PIPE_C);
>                         display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
> +                       display_runtime->fbc_mask &= ~BIT(INTEL_FBC_C);
>                 }
>  
>                 if (DISPLAY_VER(i915) >= 12 &&
>                     (dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
>                         display_runtime->pipe_mask &= ~BIT(PIPE_D);
>                         display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_D);
> +                       display_runtime->fbc_mask &= ~BIT(INTEL_FBC_D);
>                 }
>  
>                 if (!display_runtime->pipe_mask)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 652e35ed7789..dc6cbd8bb31d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1024,16 +1024,19 @@  void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
 		if (dfsm & SKL_DFSM_PIPE_B_DISABLE) {
 			display_runtime->pipe_mask &= ~BIT(PIPE_B);
 			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_B);
+			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_B);
 		}
 		if (dfsm & SKL_DFSM_PIPE_C_DISABLE) {
 			display_runtime->pipe_mask &= ~BIT(PIPE_C);
 			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
+			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_C);
 		}
 
 		if (DISPLAY_VER(i915) >= 12 &&
 		    (dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
 			display_runtime->pipe_mask &= ~BIT(PIPE_D);
 			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_D);
+			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_D);
 		}
 
 		if (!display_runtime->pipe_mask)