| Message ID | 20230911193742.836063-1-suraj.kandpal@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/dsc: Fix pic_width readout | expand |
> -----Original Message----- > From: Kandpal, Suraj <suraj.kandpal@intel.com> > Sent: Tuesday, September 12, 2023 1:08 AM > To: intel-gfx@lists.freedesktop.org > Cc: Shankar, Uma <uma.shankar@intel.com>; Manna, Animesh > <animesh.manna@intel.com>; Borah, Chaitanya Kumar > <chaitanya.kumar.borah@intel.com>; Kandpal, Suraj > <suraj.kandpal@intel.com> > Subject: [PATCH] drm/i915/dsc: Fix pic_width readout > > pic_width when written into the PPS register is divided by the no. > of vdsc instances first but the actual variable that we compare it to does not > change i.e vdsc_cfg->pic_width hence when reading the register back for > pic_width it needs to be multiplied by num_vdsc_instances rather than being > divided. > > Fixes: 8b70b5691704 ("drm/i915/vdsc: Fill the intel_dsc_get_pps_config > function") > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> LGTM. Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Regards Chaitanya > --- > drivers/gpu/drm/i915/display/intel_vdsc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c > b/drivers/gpu/drm/i915/display/intel_vdsc.c > index 5c00f7ccad7f..6757dbae9ee5 100644 > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c > @@ -879,7 +879,7 @@ static void intel_dsc_get_pps_config(struct > intel_crtc_state *crtc_state) > /* PPS 2 */ > pps_temp = intel_dsc_pps_read_and_verify(crtc_state, 2); > > - vdsc_cfg->pic_width = REG_FIELD_GET(DSC_PPS2_PIC_WIDTH_MASK, > pps_temp) / num_vdsc_instances; > + vdsc_cfg->pic_width = REG_FIELD_GET(DSC_PPS2_PIC_WIDTH_MASK, > pps_temp) > +* num_vdsc_instances; > vdsc_cfg->pic_height = > REG_FIELD_GET(DSC_PPS2_PIC_HEIGHT_MASK, pps_temp); > > /* PPS 3 */ > -- > 2.25.1
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 5c00f7ccad7f..6757dbae9ee5 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -879,7 +879,7 @@ static void intel_dsc_get_pps_config(struct intel_crtc_state *crtc_state) /* PPS 2 */ pps_temp = intel_dsc_pps_read_and_verify(crtc_state, 2); - vdsc_cfg->pic_width = REG_FIELD_GET(DSC_PPS2_PIC_WIDTH_MASK, pps_temp) / num_vdsc_instances; + vdsc_cfg->pic_width = REG_FIELD_GET(DSC_PPS2_PIC_WIDTH_MASK, pps_temp) * num_vdsc_instances; vdsc_cfg->pic_height = REG_FIELD_GET(DSC_PPS2_PIC_HEIGHT_MASK, pps_temp); /* PPS 3 */
pic_width when written into the PPS register is divided by the no. of vdsc instances first but the actual variable that we compare it to does not change i.e vdsc_cfg->pic_width hence when reading the register back for pic_width it needs to be multiplied by num_vdsc_instances rather than being divided. Fixes: 8b70b5691704 ("drm/i915/vdsc: Fill the intel_dsc_get_pps_config function") Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> --- drivers/gpu/drm/i915/display/intel_vdsc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)