| Message ID | 20231116131841.1588781-5-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Fix UHBR data, link M/N/TU and PBN values | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre > Deak > Sent: Thursday, November 16, 2023 6:49 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v2 04/11] drm/i915/dp: Replace > intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate() > > Replace intel_dp_is_uhbr_rate() with the recently added > drm_dp_is_uhbr_rate(). > > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Thanks and Regards, Arun R Murthy -------------------- > drivers/gpu/drm/i915/display/intel_display.c | 2 +- > drivers/gpu/drm/i915/display/intel_dp.c | 7 +------ > drivers/gpu/drm/i915/display/intel_dp.h | 1 - > 3 files changed, 2 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 125903007a292..1e045e4fbe582 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -2394,7 +2394,7 @@ add_bw_alloc_overhead(int link_clock, int > bw_overhead, > int pixel_data_rate, int link_data_rate, > u32 *data_m, u32 *data_n) > { > - bool is_uhbr = intel_dp_is_uhbr_rate(link_clock); > + bool is_uhbr = drm_dp_is_uhbr_rate(link_clock); > int ch_coding_efficiency = > drm_dp_bw_channel_coding_efficiency(is_uhbr); > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 54bd0bffa9f08..1b80747044a80 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -121,15 +121,10 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp) > > static void intel_dp_unset_edid(struct intel_dp *intel_dp); > > -bool intel_dp_is_uhbr_rate(int rate) > -{ > - return rate >= 1000000; > -} > - > /* Is link rate UHBR and thus 128b/132b? */ bool intel_dp_is_uhbr(const > struct intel_crtc_state *crtc_state) { > - return intel_dp_is_uhbr_rate(crtc_state->port_clock); > + return drm_dp_is_uhbr_rate(crtc_state->port_clock); > } > > static void intel_dp_set_default_sink_rates(struct intel_dp *intel_dp) diff --git > a/drivers/gpu/drm/i915/display/intel_dp.h > b/drivers/gpu/drm/i915/display/intel_dp.h > index e80da67554196..664fa93bbf534 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.h > +++ b/drivers/gpu/drm/i915/display/intel_dp.h > @@ -80,7 +80,6 @@ void intel_dp_audio_compute_config(struct intel_encoder > *encoder, > struct drm_connector_state *conn_state); > bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp); bool > intel_dp_is_edp(struct intel_dp *intel_dp); -bool intel_dp_is_uhbr_rate(int > rate); bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state); bool > intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port); > enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port, > -- > 2.39.2
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 125903007a292..1e045e4fbe582 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2394,7 +2394,7 @@ add_bw_alloc_overhead(int link_clock, int bw_overhead, int pixel_data_rate, int link_data_rate, u32 *data_m, u32 *data_n) { - bool is_uhbr = intel_dp_is_uhbr_rate(link_clock); + bool is_uhbr = drm_dp_is_uhbr_rate(link_clock); int ch_coding_efficiency = drm_dp_bw_channel_coding_efficiency(is_uhbr); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 54bd0bffa9f08..1b80747044a80 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -121,15 +121,10 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp) static void intel_dp_unset_edid(struct intel_dp *intel_dp); -bool intel_dp_is_uhbr_rate(int rate) -{ - return rate >= 1000000; -} - /* Is link rate UHBR and thus 128b/132b? */ bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state) { - return intel_dp_is_uhbr_rate(crtc_state->port_clock); + return drm_dp_is_uhbr_rate(crtc_state->port_clock); } static void intel_dp_set_default_sink_rates(struct intel_dp *intel_dp) diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index e80da67554196..664fa93bbf534 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -80,7 +80,6 @@ void intel_dp_audio_compute_config(struct intel_encoder *encoder, struct drm_connector_state *conn_state); bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp); bool intel_dp_is_edp(struct intel_dp *intel_dp); -bool intel_dp_is_uhbr_rate(int rate); bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state); bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port); enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
Replace intel_dp_is_uhbr_rate() with the recently added drm_dp_is_uhbr_rate(). Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/display/intel_dp.c | 7 +------ drivers/gpu/drm/i915/display/intel_dp.h | 1 - 3 files changed, 2 insertions(+), 8 deletions(-)