From patchwork Fri Nov 17 17:18:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13459174 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 207D4C197A0 for ; Fri, 17 Nov 2023 17:18:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9730610E307; Fri, 17 Nov 2023 17:18:44 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8881310E307 for ; Fri, 17 Nov 2023 17:18:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700241522; x=1731777522; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=4Efv1LYaYC8bmtKnCehiDmDn7hopzAW2YJ2AA9mHQpk=; b=Qt9RaUBVbKxGkgojmSk113/DC2Yc2zInQCNKa+T8AwPOZXbbxAHy+nI0 1kYMR/TXDSzpbgOxa/yZl8Wjviv2JFrd5esQ+oDQkDRd6VWZN+82B7q0k hC6NVqX3WL+pwOTMsPcsuNNs+AxswIwKPChcClAdxJqpFV6CHzsGhJJ49 99hii8C6SP0VIfpEXZ8NyCGJsyF2bnlznu0BOawdji9vk6RAZ6vRzC67R ZBl/LjQgIrRu+TyS96FV61bECot3ENFibDGi2UoS7PLoNeBfYOlg9CB6U lNSHGzNWtojLKu1pJHImk+AVXsdkZ+M2SQzSjyUWYGjUiDxYu9y0vGzbu g==; X-IronPort-AV: E=McAfee;i="6600,9927,10897"; a="422428580" X-IronPort-AV: E=Sophos;i="6.04,206,1695711600"; d="scan'208";a="422428580" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2023 09:18:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10897"; a="759225804" X-IronPort-AV: E=Sophos;i="6.04,206,1695711600"; d="scan'208";a="759225804" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga007.jf.intel.com with SMTP; 17 Nov 2023 09:18:40 -0800 Received: by stinkbox (sSMTP sendmail emulation); Fri, 17 Nov 2023 19:18:39 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Fri, 17 Nov 2023 19:18:33 +0200 Message-ID: <20231117171833.25816-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231117171833.25816-1-ville.syrjala@linux.intel.com> References: <20231117171833.25816-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/3] drm/i915/fbc: Bump ivb FBC max surface size to 4kx4k X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä IVB Bspec says: "Frame Buffer Compression is only supported with memory surfaces of 4096 lines or less and pipe source sizes of 4096 pixels by 2048 lines or less. " so seems like we should be able to bump the offset+size limit to at least 4kx4k. Make it so. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 0ac222eaddd2..63f389a1707d 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1034,7 +1034,7 @@ static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state * } else if (DISPLAY_VER(i915) >= 10) { max_w = 5120; max_h = 4096; - } else if (DISPLAY_VER(i915) >= 8 || IS_HASWELL(i915)) { + } else if (DISPLAY_VER(i915) >= 7) { max_w = 4096; max_h = 4096; } else if (IS_G4X(i915) || DISPLAY_VER(i915) >= 5) {