diff mbox series

[v3,1/3] drm/i915/dp: Use LINK_QUAL_PATTERN_* Phy test pattern names

Message ID 20231206235319.3205232-1-khaled.almahallawy@intel.com (mailing list archive)
State New, archived
Headers show
Series [v3,1/3] drm/i915/dp: Use LINK_QUAL_PATTERN_* Phy test pattern names | expand

Commit Message

Almahallawy, Khaled Dec. 6, 2023, 11:53 p.m. UTC 
Starting from DP2.0 specs, DPCD 248h is renamed
LINK_QUAL_PATTERN_SELECT and it has the same values of registers
DPCD 10Bh-10Eh.
Use the PHY pattern names defined for DPCD 10Bh-10Eh in order to add
CP2520 Pattern 3 (TPS4) phy pattern support in the next
patch of this series and DP2.1 PHY patterns for future series.

v2: rebase

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Lee Shawn C <shawn.c.lee@intel.com>
Signed-off-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

Comments

Almahallawy, Khaled Dec. 8, 2023, 7:41 p.m. UTC | #1 
On Thu, 2023-12-07 at 03:14 +0000, Patchwork wrote:
> Patch Details
> Series:	series starting with [v3,1/3] drm/i915/dp: Use
> LINK_QUAL_PATTERN_* Phy test pattern names
> URL:	https://patchwork.freedesktop.org/series/127465/
> State:	failure
> Details:	
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127465v1/index.html
> CI Bug Log - changes from CI_DRM_13990 -> Patchwork_127465v1
> Summary
> FAILURE
> 
> Serious unknown changes coming with Patchwork_127465v1 absolutely
> need to be
> verified manually.
> 
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_127465v1, please notify your bug team (
> I915-ci-infra@lists.freedesktop.org) to allow them
> to document this new failure mode, which will reduce false positives
> in CI.
> 
> External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127465v1/index.html
> 
> Participating hosts (37 -> 34)
> Missing (3): bat-dg2-9 fi-snb-2520m bat-dg1-5
> 
> Possible new issues
> Here are the unknown changes that may have been introduced in
> Patchwork_127465v1:
> 
> IGT changes
> Possible regressions
> igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
> bat-adlp-9: NOTRUN -> SKIP +2 other tests skip
> Known issues
> Here are the changes found in Patchwork_127465v1 that come from known
> issues:

This code path will never be reached by any igt-test or executed in
normal driver operation unless it is connected to PHY Comp Scope
So this regression in the cause of it
> 
> IGT changes
> Issues hit
> igt@i915_selftest@live@gem_contexts:
> 
> bat-mtlp-6: PASS -> DMESG-FAIL (i915#9780)
> igt@i915_selftest@live@gt_heartbeat:
> 
> bat-jsl-1: PASS -> DMESG-FAIL (i915#5334)
> igt@kms_pm_backlight@basic-brightness@edp-1:

This failures not related to ths patch as well

Thanks
khaled
> 
> bat-rplp-1: NOTRUN -> ABORT (i915#8668)
> Possible fixes
> igt@kms_flip@basic-flip-vs-dpms@d-dp6:
> 
> bat-adlp-11: DMESG-FAIL (i915#6868) -> PASS
> igt@kms_flip@basic-flip-vs-modeset@d-dp6:
> 
> bat-adlp-11: DMESG-WARN -> PASS
> igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
> 
> bat-rplp-1: ABORT (i915#8668) -> PASS
> Build changes
> Linux: CI_DRM_13990 -> Patchwork_127465v1
> CI-20190529: 20190529
> CI_DRM_13990: 85d33d0ad82a5c1a71492f14a5ceb67ada6a22d8 @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGT_7626: 154b7288552cd7ed3033f8ef396e88d0bd1b7646 @ 
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> Patchwork_127465v1: 85d33d0ad82a5c1a71492f14a5ceb67ada6a22d8 @
> git://anongit.freedesktop.org/gfx-ci/linux
> 
> Linux commits
> de17784582b4 drm/i915/dp: Fix passing the correct DPCD_REV for
> drm_dp_set_phy_test_pattern
> 501373f5cb6c drm/i915/dp: Add TPS4 PHY test pattern support
> 87bde8c90318 drm/i915/dp: Use LINK_QUAL_PATTERN_* Phy test pattern
> names
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3b2482bf683f..a1e63ab5761b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4683,27 +4683,27 @@  static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp,
 	u32 pattern_val;
 
 	switch (data->phy_pattern) {
-	case DP_PHY_TEST_PATTERN_NONE:
+	case DP_LINK_QUAL_PATTERN_DISABLE:
 		drm_dbg_kms(&dev_priv->drm, "Disable Phy Test Pattern\n");
 		intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe), 0x0);
 		break;
-	case DP_PHY_TEST_PATTERN_D10_2:
+	case DP_LINK_QUAL_PATTERN_D10_2:
 		drm_dbg_kms(&dev_priv->drm, "Set D10.2 Phy Test Pattern\n");
 		intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe),
 			       DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_D10_2);
 		break;
-	case DP_PHY_TEST_PATTERN_ERROR_COUNT:
+	case DP_LINK_QUAL_PATTERN_ERROR_RATE:
 		drm_dbg_kms(&dev_priv->drm, "Set Error Count Phy Test Pattern\n");
 		intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe),
 			       DDI_DP_COMP_CTL_ENABLE |
 			       DDI_DP_COMP_CTL_SCRAMBLED_0);
 		break;
-	case DP_PHY_TEST_PATTERN_PRBS7:
+	case DP_LINK_QUAL_PATTERN_PRBS7:
 		drm_dbg_kms(&dev_priv->drm, "Set PRBS7 Phy Test Pattern\n");
 		intel_de_write(dev_priv, DDI_DP_COMP_CTL(pipe),
 			       DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_PRBS7);
 		break;
-	case DP_PHY_TEST_PATTERN_80BIT_CUSTOM:
+	case DP_LINK_QUAL_PATTERN_80BIT_CUSTOM:
 		/*
 		 * FIXME: Ideally pattern should come from DPCD 0x250. As
 		 * current firmware of DPR-100 could not set it, so hardcoding
@@ -4721,7 +4721,7 @@  static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp,
 			       DDI_DP_COMP_CTL_ENABLE |
 			       DDI_DP_COMP_CTL_CUSTOM80);
 		break;
-	case DP_PHY_TEST_PATTERN_CP2520:
+	case DP_LINK_QUAL_PATTERN_CP2520_PAT_1:
 		/*
 		 * FIXME: Ideally pattern should come from DPCD 0x24A. As
 		 * current firmware of DPR-100 could not set it, so hardcoding