| Message ID | 20240126100309.2024264-1-luciano.coelho@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] drm/i915: update eDP MSO pipe mask for newer platforms | expand |
On Fri, Jan 26, 2024 at 12:03:09PM +0200, Luca Coelho wrote: > Starting from display version 14, pipes A and B are supported in eDP > MSO. After display version 20 there are no restrictions. > > Update the function that returns the pipe mask for eDP MSO > accordingly. > > Bspec: 68923, 55473 > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: James Ausmus <james.ausmus@intel.com> > Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> > Signed-off-by: Luca Coelho <luciano.coelho@intel.com> > --- > > In v2: > * allow pipes A and B from ver 14 to 20 [Gustavo] > > > drivers/gpu/drm/i915/display/intel_ddi.c | 13 ++++++++++--- > 1 file changed, 10 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index 922194b957be..29a616a8e72d 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -2336,13 +2336,20 @@ static void intel_ddi_power_up_lanes(struct intel_encoder *encoder, > } > } > > -/* Splitter enable for eDP MSO is limited to certain pipes. */ > +/* > + * Splitter enable for eDP MSO is limited to certain pipes on certain > + * platforms. > + */ > static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915) > { > - if (IS_ALDERLAKE_P(i915)) > + > + if (IS_ALDERLAKE_P(i915) || > + IS_DISPLAY_IP_RANGE(i915, IP_VER(14, 0), IP_VER(20, 0))) > return BIT(PIPE_A) | BIT(PIPE_B); > - else > + else if (DISPLAY_VER(i915) < 14) > return BIT(PIPE_A); > + > + return ~0; That looks rather confusing. I'd make it something like: if (VER >= whatever_is_the_new_version_that_i_can't_easily_find_from_bspec) return ~0; else if (VER >= 14 || ADL) return A | B; else return A; > } > > static void intel_ddi_mso_get_config(struct intel_encoder *encoder, > -- > 2.39.2
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 922194b957be..29a616a8e72d 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2336,13 +2336,20 @@ static void intel_ddi_power_up_lanes(struct intel_encoder *encoder, } } -/* Splitter enable for eDP MSO is limited to certain pipes. */ +/* + * Splitter enable for eDP MSO is limited to certain pipes on certain + * platforms. + */ static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915) { - if (IS_ALDERLAKE_P(i915)) + + if (IS_ALDERLAKE_P(i915) || + IS_DISPLAY_IP_RANGE(i915, IP_VER(14, 0), IP_VER(20, 0))) return BIT(PIPE_A) | BIT(PIPE_B); - else + else if (DISPLAY_VER(i915) < 14) return BIT(PIPE_A); + + return ~0; } static void intel_ddi_mso_get_config(struct intel_encoder *encoder,