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[91.156.196.125]) by smtp.gmail.com with ESMTPSA id w30-20020a05651204de00b00510187749besm1558863lfq.80.2024.01.30.11.37.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 11:37:05 -0800 (PST) From: Juha-Pekka Heikkila To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: [PATCH 1/4] drm/xe/pat: annotate pat index table with compression info Date: Tue, 30 Jan 2024 21:36:49 +0200 Message-Id: <20240130193652.374270-2-juhapekka.heikkila@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240130193652.374270-1-juhapekka.heikkila@gmail.com> References: <20240130193652.374270-1-juhapekka.heikkila@gmail.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Auld Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Matthew Auld In a future patch we need to be able to determine if a given pat_index enables compression on xe2. Simplest is to annotate the PAT index table with this information. Signed-off-by: Matthew Auld Reviewed-by: Juha-Pekka Heikkila Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/xe_pat.c | 9 ++++++++- drivers/gpu/drm/xe/xe_pat.h | 14 ++++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c index 1ff6bc79e7d4..c3cc6e90b068 100644 --- a/drivers/gpu/drm/xe/xe_pat.c +++ b/drivers/gpu/drm/xe/xe_pat.c @@ -104,7 +104,8 @@ static const struct xe_pat_table_entry xelpg_pat_table[] = { REG_FIELD_PREP(XE2_L3_POLICY, l3_policy) | \ REG_FIELD_PREP(XE2_L4_POLICY, l4_policy) | \ REG_FIELD_PREP(XE2_COH_MODE, __coh_mode), \ - .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY : XE_COH_NONE \ + .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY : XE_COH_NONE, \ + .compressed = comp_en \ } static const struct xe_pat_table_entry xe2_pat_table[] = { @@ -148,6 +149,12 @@ u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index) return xe->pat.table[pat_index].coh_mode; } +bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index) +{ + WARN_ON(pat_index >= xe->pat.n_entries); + return xe->pat.table[pat_index].compressed; +} + static void program_pat(struct xe_gt *gt, const struct xe_pat_table_entry table[], int n_entries) { diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h index fa0dfbe525cd..8c0fc68e844f 100644 --- a/drivers/gpu/drm/xe/xe_pat.h +++ b/drivers/gpu/drm/xe/xe_pat.h @@ -29,6 +29,10 @@ struct xe_pat_table_entry { #define XE_COH_NONE 1 #define XE_COH_AT_LEAST_1WAY 2 u16 coh_mode; + /** + * @compressed: Whether compression is enabled or not with @value. + */ + bool compressed; }; /** @@ -58,4 +62,14 @@ void xe_pat_dump(struct xe_gt *gt, struct drm_printer *p); */ u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index); +/** + * xe_pat_index_has_compression - Check if the given pat_index enables + * compression. + * @xe: xe device + * @pat_index: The pat_index to query + * + * Note: Only applicable to xe2+, where compression is part of the PAT index. + */ +bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index); + #endif