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[91.156.196.125]) by smtp.gmail.com with ESMTPSA id w30-20020a05651204de00b00510187749besm1558863lfq.80.2024.01.30.11.37.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 11:37:07 -0800 (PST) From: Juha-Pekka Heikkila To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Date: Tue, 30 Jan 2024 21:36:51 +0200 Message-Id: <20240130193652.374270-4-juhapekka.heikkila@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240130193652.374270-1-juhapekka.heikkila@gmail.com> References: <20240130193652.374270-1-juhapekka.heikkila@gmail.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Display engine support ccs only with tile4, prevent other modifiers from using compressed memory. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c index 722c84a56607..fab0871f0cdf 100644 --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c @@ -10,9 +10,18 @@ #include "intel_fb_pin.h" #include "xe_ggtt.h" #include "xe_gt.h" +#include "xe_pat.h" #include +static bool is_compressed(const struct drm_framebuffer *fb) +{ + struct xe_bo *bo = intel_fb_obj(fb); + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev); + + return xe_pat_index_has_compression(xe, bo->pat_index); +} + static void write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs, u32 width, u32 height, u32 src_stride, u32 dst_stride) @@ -283,6 +292,17 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb, if (ret) goto err; + if (GRAPHICS_VER(xe) >= 20) { + if (fb->base.modifier != I915_FORMAT_MOD_4_TILED && + is_compressed(&fb->base)) { + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n"); + ttm_bo_unreserve(&bo->ttm); + ret = -EINVAL; + goto err; + } + bo->has_sealed_pat_index = true; + } + if (IS_DGFX(xe)) ret = xe_bo_migrate(bo, XE_PL_VRAM0); else @@ -308,6 +328,7 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb, ttm_bo_unpin(&bo->ttm); ttm_bo_unreserve(&bo->ttm); err: + bo->has_sealed_pat_index = false; kfree(vma); return ERR_PTR(ret); } @@ -323,6 +344,8 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma) vma->bo->ggtt_node.start != vma->node.start) xe_ggtt_remove_node(ggtt, &vma->node); + vma->bo->has_sealed_pat_index = false; + ttm_bo_reserve(&vma->bo->ttm, false, false, NULL); ttm_bo_unpin(&vma->bo->ttm); ttm_bo_unreserve(&vma->bo->ttm);