From patchwork Wed Feb 14 08:48:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13556083 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 96B7DC48BC4 for ; Wed, 14 Feb 2024 08:50:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F138010E64E; Wed, 14 Feb 2024 08:50:24 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="XqWrMuQ1"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id 757E810E613 for ; Wed, 14 Feb 2024 08:50:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707900622; x=1739436622; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=K6TNbi5bBSYR1eNt1IrL2jfKEVe2wXtmHynxXw5hhQI=; b=XqWrMuQ19B8tgV0bU9I50G/HkQAcc6a8sg/R9K7nuQDOX8y+uqEAyKHT zAzgC3KummcSdGGjR5lMO4EVciEqI1eSitttd9zdvqAuJXNbg5hT7RQ8G TBc7MbziRF6vw7yotJsH5TT7vOOKufl7GT/8emBZOyXO0qaNqkPxSPiy1 0QsabnM4xV0kppMLBjn+UbK5jQ4i0N3XzK1f8RhIdsD1YqPNpMG/pWc++ QLpQT4x/uCJC7JKhz9Iu6Q5jGAj14DxKb8o11ZpooBihFCHfP7zhStfcj c6vyb4aLgfM6HZeh/w+8CjkW9+Z1Rf69NbWAarMIUoXevRSKhvMRGuHSQ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10982"; a="13323631" X-IronPort-AV: E=Sophos;i="6.06,159,1705392000"; d="scan'208";a="13323631" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2024 00:50:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,159,1705392000"; d="scan'208";a="3295673" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by fmviesa008.fm.intel.com with ESMTP; 14 Feb 2024 00:50:21 -0800 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Cc: uma.shankar@intel.com, ankit.k.nautiyal@intel.com, Suraj Kandpal Subject: [PATCH 08/12] drm/i915/hdcp: Remove additional timing for reading mst hdcp message Date: Wed, 14 Feb 2024 14:18:06 +0530 Message-Id: <20240214084810.1417186-9-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240214084810.1417186-1-suraj.kandpal@intel.com> References: <20240214084810.1417186-1-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Now that we have moved back to direct reads the additional timing is not required hence this can be removed. --v2 -Add Fixes tag [Ankit] Fixes: 3974f9c17bb9 ("drm/i915/hdcp: Adjust timeout for read in DPMST Scenario") Signed-off-by: Suraj Kandpal Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index c32303e7a059..9a82a3a5dfec 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -551,13 +551,8 @@ int intel_dp_hdcp2_read_msg(struct intel_connector *connector, /* Entire msg read timeout since initiate of msg read */ if (bytes_to_recv == size - 1 && hdcp2_msg_data->msg_read_timeout > 0) { - if (intel_encoder_is_mst(connector->encoder)) - msg_end = ktime_add_ms(ktime_get_raw(), - hdcp2_msg_data->msg_read_timeout * - connector->port->parent->num_ports); - else - msg_end = ktime_add_ms(ktime_get_raw(), - hdcp2_msg_data->msg_read_timeout); + msg_end = ktime_add_ms(ktime_get_raw(), + hdcp2_msg_data->msg_read_timeout); } ret = drm_dp_dpcd_read(aux, offset,