From patchwork Thu Feb 15 13:59:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andi Shyti X-Patchwork-Id: 13558445 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C999FC4829E for ; Thu, 15 Feb 2024 14:00:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 81EAD10E77E; Thu, 15 Feb 2024 14:00:21 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="VIiaM9XT"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 98D2A10E77E; Thu, 15 Feb 2024 14:00:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1708005620; x=1739541620; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HPtiP7PZxZwC5GGDZKuHaMs0/IGLQ0pcFgPpdFKI2tg=; b=VIiaM9XTh6c081J7EH1Uld6BcERzZJiq7LYba1MCGrdmPxv/lCOna7iy 0HtI3eEJGVPk1TVhwH9Z4RTenK2woBTOkRW/tIOI+EMA/S8zGzJJ7SqUE Iaw+kfx3+NbS2lMzLx4Mm6Mrep/HlI9WB7BqFwF9N0yEAYVMQyWDucT9t cxsDt2hJDjYdWE0D+6Saam/IQLjrDnfcM5gjiG+jMcQVyAYL1SLT4pXLN Bt8MtaEMvddoBXozXscTEEpB0gXjnutfOWpBKpU7bs2uHgn+z28457y6M UwFhcYaHNFd4GAvOTjK27FvxyZ+iwF7ReCF7scbs2IhPWG+mzEstXbww1 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10984"; a="5061176" X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="5061176" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Feb 2024 06:00:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="8188588" Received: from yspisare-mobl2.ger.corp.intel.com (HELO intel.com) ([10.246.50.215]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Feb 2024 06:00:17 -0800 From: Andi Shyti To: intel-gfx , dri-devel Cc: Chris Wilson , Joonas Lahtinen , Matt Roper , stable@vger.kernel.org, Andi Shyti , Andi Shyti Subject: [PATCH 1/2] drm/i915/gt: Disable HW load balancing for CCS Date: Thu, 15 Feb 2024 14:59:23 +0100 Message-ID: <20240215135924.51705-2-andi.shyti@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240215135924.51705-1-andi.shyti@linux.intel.com> References: <20240215135924.51705-1-andi.shyti@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The hardware should not dynamically balance the load between CCS engines. Wa_16016805146 recommends disabling it across all platforms. Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement") Signed-off-by: Andi Shyti Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Matt Roper Cc: # v6.2+ --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index 50962cfd1353..cf709f6c05ae 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -1478,6 +1478,7 @@ #define GEN12_RCU_MODE _MMIO(0x14800) #define GEN12_RCU_MODE_CCS_ENABLE REG_BIT(0) +#define XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE REG_BIT(1) #define CHV_FUSE_GT _MMIO(VLV_GUNIT_BASE + 0x2168) #define CHV_FGT_DISABLE_SS0 (1 << 10) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index d67d44611c28..7f42c8015f71 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -2988,6 +2988,12 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li wa_mcr_masked_en(wal, GEN8_HALF_SLICE_CHICKEN1, GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE); } + + /* + * Wa_16016805146: disable the CCS load balancing + * indiscriminately for all the platforms + */ + wa_masked_en(wal, GEN12_RCU_MODE, XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE); } static void