From patchwork Tue Feb 27 18:18:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srinivas, Vidya" X-Patchwork-Id: 13574288 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BF84EC54E41 for ; Tue, 27 Feb 2024 18:37:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0421710E654; Tue, 27 Feb 2024 18:37:41 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="fOXkPKXC"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id A4FBC10E6E5 for ; Tue, 27 Feb 2024 18:37:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709059058; x=1740595058; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=N8qmqeeadCAVyx5n8MGmW+KQwANWF0NxRg5J2UkyCl0=; b=fOXkPKXCsjwpYtXM+6tRTWB6RUB8gNnEhQPxgLHkBPkCsrvrmMPOHstJ FNQ5NcG21oK0a8vF38DjqiUDgRampOTMr03hoJQI+lFWFD3+PR99WzX83 JNw+5TD7HcAouagc/tOnRFo+slMkZSKCqdwb00b3zGEGFKNC6Pt83+dno qND4JiM393LpBJsKISZombv2Px0eBE0tN7gxfBrAryPX4A48lI2skrGAp KhYsZCuj+xwcdn0ObCCFGyaunwrBOc9CS2Ub06EKIXcWS9mlJ0DThpSc9 paZ/dTN0WdZcS7H2phPyKJH2ARxUxs0AqwTfCiJzd1v48pQmRx7ES7b1v Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10996"; a="14060072" X-IronPort-AV: E=Sophos;i="6.06,188,1705392000"; d="scan'208";a="14060072" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Feb 2024 10:37:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,188,1705392000"; d="scan'208";a="7188280" Received: from vsrini4-xps-8920.iind.intel.com (HELO localhost.localdomain) ([10.223.163.48]) by orviesa009.jf.intel.com with ESMTP; 27 Feb 2024 10:37:37 -0800 From: Vidya Srinivas To: intel-gfx@lists.freedesktop.org Cc: khaled.almahallawy@intel.com, Vidya Srinivas Subject: [PATCH 2/2] drm/i915: Allow bigjoiner for MST Date: Tue, 27 Feb 2024 23:48:49 +0530 Message-Id: <20240227181849.22614-3-vidya.srinivas@intel.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20240227181849.22614-1-vidya.srinivas@intel.com> References: <20240227181849.22614-1-vidya.srinivas@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We need bigjoiner support with MST functionality for MST monitor resolutions > 5K to work. Adding support for the same. Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index b062f4ee6c8b..c5e7293c13eb 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -525,6 +525,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); struct intel_dp *intel_dp = &intel_mst->primary->dp; const struct intel_connector *connector = @@ -542,6 +543,10 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) return -EINVAL; + if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay, + adjusted_mode->crtc_clock)) + pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); + pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->has_pch_encoder = false; @@ -1330,12 +1335,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, * corresponding link capabilities of the sink) in case the * stream is uncompressed for it by the last branch device. */ - if (mode_rate > max_rate || mode->clock > max_dotclk || - drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) { - *status = MODE_CLOCK_HIGH; - return 0; - } - if (mode->clock < 10000) { *status = MODE_CLOCK_LOW; return 0; @@ -1351,6 +1350,12 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, max_dotclk *= 2; } + if (mode_rate > max_rate || mode->clock > max_dotclk || + drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) { + *status = MODE_CLOCK_HIGH; + return 0; + } + if (DISPLAY_VER(dev_priv) >= 10 && drm_dp_sink_supports_dsc(intel_connector->dp.dsc_dpcd)) { /* @@ -1393,7 +1398,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, return 0; } - *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); + *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); return 0; }