diff mbox series

[V2] drm/i915/mtl: Update workaround 14018575942

Message ID 20240228103738.2018458-1-tejas.upadhyay@intel.com (mailing list archive)
State New, archived
Headers show
Series [V2] drm/i915/mtl: Update workaround 14018575942 | expand

Commit Message

Upadhyay, Tejas Feb. 28, 2024, 10:37 a.m. UTC
Applying WA 14018575942 only on Compute engine has impact on
some apps like chrome. Updating this WA to apply on Render
engine as well as it is helping with performance on Chrome.

Note: There is no concern from media team thus not applying
WA on media engines. We will revisit if any issues reported
from media team.

V2(Matt):
 - Use correct WA number

Fixes: 668f37e1ee11 ("drm/i915/mtl: Update workaround 14018778641")
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Matt Roper Feb. 28, 2024, 5:38 p.m. UTC | #1
On Wed, Feb 28, 2024 at 04:07:38PM +0530, Tejas Upadhyay wrote:
> Applying WA 14018575942 only on Compute engine has impact on
> some apps like chrome. Updating this WA to apply on Render
> engine as well as it is helping with performance on Chrome.
> 
> Note: There is no concern from media team thus not applying
> WA on media engines. We will revisit if any issues reported
> from media team.
> 
> V2(Matt):
>  - Use correct WA number
> 
> Fixes: 668f37e1ee11 ("drm/i915/mtl: Update workaround 14018778641")
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index d67d44611c28..25413809b9dc 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1653,6 +1653,7 @@ static void
>  xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
>  	/* Wa_14018575942 / Wa_18018781329 */
> +	wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);
>  	wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB);
>  
>  	/* Wa_22016670082 */
> -- 
> 2.25.1
>
Andi Shyti Feb. 29, 2024, 10:21 a.m. UTC | #2
Hi Tejas,

On Wed, Feb 28, 2024 at 04:07:38PM +0530, Tejas Upadhyay wrote:
> Applying WA 14018575942 only on Compute engine has impact on
> some apps like chrome. Updating this WA to apply on Render
> engine as well as it is helping with performance on Chrome.
> 
> Note: There is no concern from media team thus not applying
> WA on media engines. We will revisit if any issues reported
> from media team.
> 
> V2(Matt):
>  - Use correct WA number
> 
> Fixes: 668f37e1ee11 ("drm/i915/mtl: Update workaround 14018778641")
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>

Let's wait for a green CI. Unfortunately you got an unrelated
failure.

In the meantime:

Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>

Thanks,
Andi

> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index d67d44611c28..25413809b9dc 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1653,6 +1653,7 @@ static void
>  xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>  {
>  	/* Wa_14018575942 / Wa_18018781329 */
> +	wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);
>  	wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB);
>  
>  	/* Wa_22016670082 */
> -- 
> 2.25.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index d67d44611c28..25413809b9dc 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1653,6 +1653,7 @@  static void
 xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 {
 	/* Wa_14018575942 / Wa_18018781329 */
+	wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);
 	wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB);
 
 	/* Wa_22016670082 */