Message ID | 20240327174544.983-11-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915: Implemnt vblank sycnhronized mbus joining changes | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Wednesday, March 27, 2024 11:16 PM > To: intel-gfx@lists.freedesktop.org > Subject: [PATCH 10/13] drm/i915: Use old mbus_join value when increasing > CDCLK > > From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > In order to make sure we are not breaking the proper sequence lets to updates Nit: %s/lets to/lets do > step by step and don't change MBUS join value during MDCLK/CDCLK > programming stage. > MBUS join programming would be taken care by pre/post ddb hooks. > > v2: - Reworded comment about using old mbus_join value in > intel_set_cdclk(Ville Syrjälä) Looks Good to me. Reviewed-by: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > [v3: vsyrjala: rebase on top of cdclk changes, reword a bit more] > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_cdclk.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c > b/drivers/gpu/drm/i915/display/intel_cdclk.c > index 98546f384023..4024118a7ffb 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > @@ -2612,6 +2612,12 @@ intel_set_cdclk_pre_plane_update(struct > intel_atomic_state *state) > old_cdclk_state- > >actual.voltage_level); > } > > + /* > + * mbus joining will be changed later by > + * intel_dbuf_mbus_{pre,post}_ddb_update() > + */ > + cdclk_config.joined_mbus = old_cdclk_state->actual.joined_mbus; > + > drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed); > > intel_set_cdclk(i915, &cdclk_config, new_cdclk_state->pipe, > -- > 2.43.2
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 98546f384023..4024118a7ffb 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -2612,6 +2612,12 @@ intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state) old_cdclk_state->actual.voltage_level); } + /* + * mbus joining will be changed later by + * intel_dbuf_mbus_{pre,post}_ddb_update() + */ + cdclk_config.joined_mbus = old_cdclk_state->actual.joined_mbus; + drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed); intel_set_cdclk(i915, &cdclk_config, new_cdclk_state->pipe,