| Message ID | 20240327174544.983-8-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Implemnt vblank sycnhronized mbus joining changes | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Wednesday, March 27, 2024 11:16 PM > To: intel-gfx@lists.freedesktop.org > Subject: [PATCH 07/13] drm/i915: Extract intel_dbuf_mbus_join_update() > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Extact the stuff that writes the joining bits in MBUS_CTL into its own function. > Will help with correctly sequencing the operations done during mbus > programming. Looks Good to me. Reviewed-by: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/skl_watermark.c | 37 +++++++++++++------- > 1 file changed, 25 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c > b/drivers/gpu/drm/i915/display/skl_watermark.c > index 6bd3fec0aa56..f7e03078bd43 100644 > --- a/drivers/gpu/drm/i915/display/skl_watermark.c > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c > @@ -3653,21 +3653,12 @@ void intel_dbuf_mdclk_cdclk_ratio_update(struct > drm_i915_private *i915, u8 ratio > DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1)); } > > -/* > - * Configure MBUS_CTL and all DBUF_CTL_S of each slice to join_mbus state > before > - * update the request state of all DBUS slices. > - */ > -static void update_mbus_pre_enable(struct intel_atomic_state *state) > +static void intel_dbuf_mbus_join_update(struct intel_atomic_state > +*state) > { > struct drm_i915_private *i915 = to_i915(state->base.dev); > + const struct intel_dbuf_state *new_dbuf_state = > + intel_atomic_get_new_dbuf_state(state); > u32 mbus_ctl; > - const struct intel_dbuf_state *old_dbuf_state = > - intel_atomic_get_old_dbuf_state(state); > - const struct intel_dbuf_state *new_dbuf_state = > - intel_atomic_get_new_dbuf_state(state); > - > - if (!HAS_MBUS_JOINING(i915)) > - return; > > /* > * TODO: Implement vblank synchronized MBUS joining changes. > @@ -3683,6 +3674,28 @@ static void update_mbus_pre_enable(struct > intel_atomic_state *state) > intel_de_rmw(i915, MBUS_CTL, > MBUS_HASHING_MODE_MASK | MBUS_JOIN | > MBUS_JOIN_PIPE_SELECT_MASK, mbus_ctl); > +} > + > +/* > + * Configure MBUS_CTL and all DBUF_CTL_S of each slice to join_mbus > +state before > + * update the request state of all DBUS slices. > + */ > +static void update_mbus_pre_enable(struct intel_atomic_state *state) { > + struct drm_i915_private *i915 = to_i915(state->base.dev); > + const struct intel_dbuf_state *old_dbuf_state = > + intel_atomic_get_old_dbuf_state(state); > + const struct intel_dbuf_state *new_dbuf_state = > + intel_atomic_get_new_dbuf_state(state); > + > + if (!HAS_MBUS_JOINING(i915)) > + return; > + > + /* > + * TODO: Implement vblank synchronized MBUS joining changes. > + * Must be properly coordinated with dbuf reprogramming. > + */ > + intel_dbuf_mbus_join_update(state); > > if (DISPLAY_VER(i915) >= 20 && > old_dbuf_state->mdclk_cdclk_ratio != new_dbuf_state- > >mdclk_cdclk_ratio) { > -- > 2.43.2
Quoting Ville Syrjala (2024-03-27 14:45:38-03:00) >From: Ville Syrjälä <ville.syrjala@linux.intel.com> > >Extact the stuff that writes the joining bits in MBUS_CTL >into its own function. Will help with correctly sequencing >the operations done during mbus programming. > >Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> >--- > drivers/gpu/drm/i915/display/skl_watermark.c | 37 +++++++++++++------- > 1 file changed, 25 insertions(+), 12 deletions(-) > >diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c >index 6bd3fec0aa56..f7e03078bd43 100644 >--- a/drivers/gpu/drm/i915/display/skl_watermark.c >+++ b/drivers/gpu/drm/i915/display/skl_watermark.c >@@ -3653,21 +3653,12 @@ void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915, u8 ratio > DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1)); > } > >-/* >- * Configure MBUS_CTL and all DBUF_CTL_S of each slice to join_mbus state before >- * update the request state of all DBUS slices. >- */ >-static void update_mbus_pre_enable(struct intel_atomic_state *state) >+static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state) > { > struct drm_i915_private *i915 = to_i915(state->base.dev); >+ const struct intel_dbuf_state *new_dbuf_state = >+ intel_atomic_get_new_dbuf_state(state); > u32 mbus_ctl; >- const struct intel_dbuf_state *old_dbuf_state = >- intel_atomic_get_old_dbuf_state(state); >- const struct intel_dbuf_state *new_dbuf_state = >- intel_atomic_get_new_dbuf_state(state); >- >- if (!HAS_MBUS_JOINING(i915)) >- return; > > /* > * TODO: Implement vblank synchronized MBUS joining changes. >@@ -3683,6 +3674,28 @@ static void update_mbus_pre_enable(struct intel_atomic_state *state) > intel_de_rmw(i915, MBUS_CTL, > MBUS_HASHING_MODE_MASK | MBUS_JOIN | > MBUS_JOIN_PIPE_SELECT_MASK, mbus_ctl); >+} >+ >+/* >+ * Configure MBUS_CTL and all DBUF_CTL_S of each slice to join_mbus state before >+ * update the request state of all DBUS slices. >+ */ >+static void update_mbus_pre_enable(struct intel_atomic_state *state) >+{ >+ struct drm_i915_private *i915 = to_i915(state->base.dev); >+ const struct intel_dbuf_state *old_dbuf_state = >+ intel_atomic_get_old_dbuf_state(state); >+ const struct intel_dbuf_state *new_dbuf_state = >+ intel_atomic_get_new_dbuf_state(state); >+ >+ if (!HAS_MBUS_JOINING(i915)) >+ return; >+ >+ /* >+ * TODO: Implement vblank synchronized MBUS joining changes. >+ * Must be properly coordinated with dbuf reprogramming. >+ */ >+ intel_dbuf_mbus_join_update(state); > > if (DISPLAY_VER(i915) >= 20 && > old_dbuf_state->mdclk_cdclk_ratio != new_dbuf_state->mdclk_cdclk_ratio) { >-- >2.43.2 >
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 6bd3fec0aa56..f7e03078bd43 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -3653,21 +3653,12 @@ void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915, u8 ratio DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1)); } -/* - * Configure MBUS_CTL and all DBUF_CTL_S of each slice to join_mbus state before - * update the request state of all DBUS slices. - */ -static void update_mbus_pre_enable(struct intel_atomic_state *state) +static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state) { struct drm_i915_private *i915 = to_i915(state->base.dev); + const struct intel_dbuf_state *new_dbuf_state = + intel_atomic_get_new_dbuf_state(state); u32 mbus_ctl; - const struct intel_dbuf_state *old_dbuf_state = - intel_atomic_get_old_dbuf_state(state); - const struct intel_dbuf_state *new_dbuf_state = - intel_atomic_get_new_dbuf_state(state); - - if (!HAS_MBUS_JOINING(i915)) - return; /* * TODO: Implement vblank synchronized MBUS joining changes. @@ -3683,6 +3674,28 @@ static void update_mbus_pre_enable(struct intel_atomic_state *state) intel_de_rmw(i915, MBUS_CTL, MBUS_HASHING_MODE_MASK | MBUS_JOIN | MBUS_JOIN_PIPE_SELECT_MASK, mbus_ctl); +} + +/* + * Configure MBUS_CTL and all DBUF_CTL_S of each slice to join_mbus state before + * update the request state of all DBUS slices. + */ +static void update_mbus_pre_enable(struct intel_atomic_state *state) +{ + struct drm_i915_private *i915 = to_i915(state->base.dev); + const struct intel_dbuf_state *old_dbuf_state = + intel_atomic_get_old_dbuf_state(state); + const struct intel_dbuf_state *new_dbuf_state = + intel_atomic_get_new_dbuf_state(state); + + if (!HAS_MBUS_JOINING(i915)) + return; + + /* + * TODO: Implement vblank synchronized MBUS joining changes. + * Must be properly coordinated with dbuf reprogramming. + */ + intel_dbuf_mbus_join_update(state); if (DISPLAY_VER(i915) >= 20 && old_dbuf_state->mdclk_cdclk_ratio != new_dbuf_state->mdclk_cdclk_ratio) {