From patchwork Thu Mar 28 12:22:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Usyskin, Alexander" X-Patchwork-Id: 13608454 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D0F31CD128A for ; Thu, 28 Mar 2024 12:26:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 516B010F7C9; Thu, 28 Mar 2024 12:26:30 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="XwfabJyB"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4482610F4EC for ; Thu, 28 Mar 2024 12:26:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1711628786; x=1743164786; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0DbXhb2tsKCAcvpzv5zMcZ3BA91k4uRD9zDgtnWLzYE=; b=XwfabJyBOdFT67wewjYtgvsVleYxI5/1i6rItbIv/CUDQSxFjSELSmwl 7tpHjhSM9/yIpKmE6mUbZpnZMfDaP9BJ+zLVMK06Sk4oD9XfB75Cy4WFl QCVI2xqHvGg5XshWj4PirSGWIHwtG1k6687EFTKf2yJP+9lFP2EQV8v82 v6QD/EtF9xMaEOU16YyjwLT+lv2LO3SjurFqn/Q+iINYowczvUlQGwwt2 Mj7z4aSSvNEla4LQmrWRj/f/Arf/Lm/UVdBldO9wz60ioCxEYdS/u9uxL bKZ0KAExtb+VzGN4diy7SvPvz1Ah9V70MVJ7YI4y5Sao1AgmEfDk5tZBE A==; X-CSE-ConnectionGUID: 6nU+IzXqTd6ndKMEZ4OhDQ== X-CSE-MsgGUID: 5Zw30IzeQs2LqgsFTXPJeQ== X-IronPort-AV: E=McAfee;i="6600,9927,11026"; a="17505465" X-IronPort-AV: E=Sophos;i="6.07,161,1708416000"; d="scan'208";a="17505465" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Mar 2024 05:26:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,161,1708416000"; d="scan'208";a="16657569" Received: from sannilnx-dsk.jer.intel.com ([10.12.231.107]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Mar 2024 05:26:23 -0700 From: Alexander Usyskin To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi Cc: Alexander Usyskin , Vitaly Lubart , linux-mtd@lists.infradead.org, intel-gfx@lists.freedesktop.org, Lucas De Marchi , Tomas Winkler Subject: [PATCH 03/13] drm/i915/spi: add intel_spi_region map Date: Thu, 28 Mar 2024 14:22:26 +0200 Message-Id: <20240328122236.1718111-4-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240328122236.1718111-1-alexander.usyskin@intel.com> References: <20240328122236.1718111-1-alexander.usyskin@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add the dGFX spi region map and convey it via auxiliary device to the spi child device. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler --- drivers/gpu/drm/i915/spi/intel_spi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/spi/intel_spi.c b/drivers/gpu/drm/i915/spi/intel_spi.c index 17e4c7861ef5..8dd4065551e2 100644 --- a/drivers/gpu/drm/i915/spi/intel_spi.c +++ b/drivers/gpu/drm/i915/spi/intel_spi.c @@ -11,6 +11,13 @@ #define GEN12_GUNIT_SPI_SIZE 0x80 +static const struct intel_dg_spi_region regions[INTEL_DG_SPI_REGIONS] = { + [0] = { .name = "DESCRIPTOR", }, + [2] = { .name = "GSC", }, + [11] = { .name = "OptionROM", }, + [12] = { .name = "DAM", }, +}; + static void i915_spi_release_dev(struct device *dev) { } @@ -31,6 +38,7 @@ void intel_spi_init(struct drm_i915_private *dev_priv) spi->bar.end = spi->bar.start + GEN12_GUNIT_SPI_SIZE - 1; spi->bar.flags = IORESOURCE_MEM; spi->bar.desc = IORES_DESC_NONE; + spi->regions = regions; aux_dev->name = "spi"; aux_dev->id = (pci_domain_nr(pdev->bus) << 16) |