diff mbox series

[10/22] drm/i915: Extract intel_dp_joiner_needs_dsc()

Message ID 20240329011254.24160-11-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Bigjoiner modeset sequence redesign and MST support | expand

Commit Message

Ville Syrjälä March 29, 2024, 1:12 a.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the "does joiner need DSC?" check into a helper. MST will
want to use this too at some point.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 26 ++++++++++-----------
 drivers/gpu/drm/i915/display/intel_dp.h     |  1 +
 drivers/gpu/drm/i915/display/intel_dp_mst.c |  6 +----
 3 files changed, 15 insertions(+), 18 deletions(-)

Comments

Shankar, Uma April 1, 2024, 9:22 a.m. UTC | #1
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Friday, March 29, 2024 6:43 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 10/22] drm/i915: Extract intel_dp_joiner_needs_dsc()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Pull the "does joiner need DSC?" check into a helper. MST will want to use this too
> at some point.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     | 26 ++++++++++-----------
>  drivers/gpu/drm/i915/display/intel_dp.h     |  1 +
>  drivers/gpu/drm/i915/display/intel_dp_mst.c |  6 +----
>  3 files changed, 15 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 402b3b8f6382..6fa8fc56a39c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1302,11 +1302,7 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
>  		dsc = dsc_max_compressed_bpp && dsc_slice_count;
>  	}
> 
> -	/*
> -	 * Big joiner configuration needs DSC for TGL which is not true for
> -	 * XE_LPD where uncompressed joiner is supported.
> -	 */
> -	if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc)
> +	if (intel_dp_joiner_needs_dsc(dev_priv, bigjoiner) && !dsc)
>  		return MODE_CLOCK_HIGH;
> 
>  	if (mode_rate > max_rate && !dsc)
> @@ -2395,6 +2391,16 @@ int intel_dp_config_required_rate(const struct
> intel_crtc_state *crtc_state)
>  	return intel_dp_link_required(adjusted_mode->crtc_clock, bpp);  }
> 
> +bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool
> +use_joiner) {
> +	/*
> +	 * Pipe joiner needs compression up to display 12 due to bandwidth
> +	 * limitation. DG2 onwards pipe joiner can be enabled without
> +	 * compression.
> +	 */
> +	return DISPLAY_VER(i915) < 13 && use_joiner; }
> +
>  static int
>  intel_dp_compute_link_config(struct intel_encoder *encoder,
>  			     struct intel_crtc_state *pipe_config, @@ -2409,8
> +2415,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>  		&pipe_config->hw.adjusted_mode;
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	struct link_config_limits limits;
> -	bool joiner_needs_dsc = false;
> -	bool dsc_needed;
> +	bool dsc_needed, joiner_needs_dsc;
>  	int ret = 0;
> 
>  	if (pipe_config->fec_enable &&
> @@ -2421,12 +2426,7 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
>  				    adjusted_mode->crtc_clock))
>  		pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc-
> >pipe);
> 
> -	/*
> -	 * Pipe joiner needs compression up to display 12 due to bandwidth
> -	 * limitation. DG2 onwards pipe joiner can be enabled without
> -	 * compression.
> -	 */
> -	joiner_needs_dsc = DISPLAY_VER(i915) < 13 && pipe_config-
> >bigjoiner_pipes;
> +	joiner_needs_dsc = intel_dp_joiner_needs_dsc(i915,
> +pipe_config->bigjoiner_pipes);
> 
>  	dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
>  		     !intel_dp_compute_config_limits(intel_dp, pipe_config, diff --
> git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 4a4b39f2748b..d5697b99ac21 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -119,6 +119,7 @@ int intel_dp_effective_data_rate(int pixel_clock, int
> bpp_x16,
>  				 int bw_overhead);
>  int intel_dp_max_link_data_rate(struct intel_dp *intel_dp,
>  				int max_dprx_rate, int max_dprx_lanes);
> +bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool
> +use_joiner);
>  bool intel_dp_has_bigjoiner(struct intel_dp *intel_dp);  bool
> intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
>  			    const struct drm_connector_state *conn_state); diff --
> git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 1405ab5e3acc..6da031f9724d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -1377,11 +1377,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector
> *connector,
>  		dsc = dsc_max_compressed_bpp && dsc_slice_count;
>  	}
> 
> -	/*
> -	 * Big joiner configuration needs DSC for TGL which is not true for
> -	 * XE_LPD where uncompressed joiner is supported.
> -	 */
> -	if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc) {
> +	if (intel_dp_joiner_needs_dsc(dev_priv, bigjoiner) && !dsc) {
>  		*status = MODE_CLOCK_HIGH;
>  		return 0;
>  	}
> --
> 2.43.2
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 402b3b8f6382..6fa8fc56a39c 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1302,11 +1302,7 @@  intel_dp_mode_valid(struct drm_connector *_connector,
 		dsc = dsc_max_compressed_bpp && dsc_slice_count;
 	}
 
-	/*
-	 * Big joiner configuration needs DSC for TGL which is not true for
-	 * XE_LPD where uncompressed joiner is supported.
-	 */
-	if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc)
+	if (intel_dp_joiner_needs_dsc(dev_priv, bigjoiner) && !dsc)
 		return MODE_CLOCK_HIGH;
 
 	if (mode_rate > max_rate && !dsc)
@@ -2395,6 +2391,16 @@  int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state)
 	return intel_dp_link_required(adjusted_mode->crtc_clock, bpp);
 }
 
+bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner)
+{
+	/*
+	 * Pipe joiner needs compression up to display 12 due to bandwidth
+	 * limitation. DG2 onwards pipe joiner can be enabled without
+	 * compression.
+	 */
+	return DISPLAY_VER(i915) < 13 && use_joiner;
+}
+
 static int
 intel_dp_compute_link_config(struct intel_encoder *encoder,
 			     struct intel_crtc_state *pipe_config,
@@ -2409,8 +2415,7 @@  intel_dp_compute_link_config(struct intel_encoder *encoder,
 		&pipe_config->hw.adjusted_mode;
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct link_config_limits limits;
-	bool joiner_needs_dsc = false;
-	bool dsc_needed;
+	bool dsc_needed, joiner_needs_dsc;
 	int ret = 0;
 
 	if (pipe_config->fec_enable &&
@@ -2421,12 +2426,7 @@  intel_dp_compute_link_config(struct intel_encoder *encoder,
 				    adjusted_mode->crtc_clock))
 		pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe);
 
-	/*
-	 * Pipe joiner needs compression up to display 12 due to bandwidth
-	 * limitation. DG2 onwards pipe joiner can be enabled without
-	 * compression.
-	 */
-	joiner_needs_dsc = DISPLAY_VER(i915) < 13 && pipe_config->bigjoiner_pipes;
+	joiner_needs_dsc = intel_dp_joiner_needs_dsc(i915, pipe_config->bigjoiner_pipes);
 
 	dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
 		     !intel_dp_compute_config_limits(intel_dp, pipe_config,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 4a4b39f2748b..d5697b99ac21 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -119,6 +119,7 @@  int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16,
 				 int bw_overhead);
 int intel_dp_max_link_data_rate(struct intel_dp *intel_dp,
 				int max_dprx_rate, int max_dprx_lanes);
+bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner);
 bool intel_dp_has_bigjoiner(struct intel_dp *intel_dp);
 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
 			    const struct drm_connector_state *conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 1405ab5e3acc..6da031f9724d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1377,11 +1377,7 @@  intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
 		dsc = dsc_max_compressed_bpp && dsc_slice_count;
 	}
 
-	/*
-	 * Big joiner configuration needs DSC for TGL which is not true for
-	 * XE_LPD where uncompressed joiner is supported.
-	 */
-	if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc) {
+	if (intel_dp_joiner_needs_dsc(dev_priv, bigjoiner) && !dsc) {
 		*status = MODE_CLOCK_HIGH;
 		return 0;
 	}