From patchwork Thu Apr 4 21:34:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13618238 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2429C67861 for ; Thu, 4 Apr 2024 21:35:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 57440113571; Thu, 4 Apr 2024 21:35:01 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="g0ErZnm4"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id D78DD11356B for ; Thu, 4 Apr 2024 21:34:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712266498; x=1743802498; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=06xw9sd4291wnGmKdt+InDVaSkk9GiTKwHlCPkz0GNo=; b=g0ErZnm4Yy3pFES2CrslZrEXcl+JRFgz+3Agf1OhCkQsO+Z5yFUyS55W NBF1dvjDF/hlEKzlFvCRAK1Dq96GyyhBkVFoj8HpAs+FckDnaBUQIEoA9 O7k3eY6hi7O3mxQ3veR4be9PTBJpDtj+94ek0bcpiX7k6uYqv9o+wD732 IAxIRGS3keeOD07UBtaoR9v+OsPKYqwKmcmsCHjuWNZdHW2M+SsrAEvC1 v6cQtVeyRdUlRv5Mo9KOYacKsj9LbOQIAxKVjVM5RLjdn9V/JYh06rV83 3uFLVtxLEMK2gY4/o4WAgkT6EijhnchCi9DeZDdoBGEDMREKuBDD875qH A==; X-CSE-ConnectionGUID: RsyIfLKQQrKje/nkLsuHIA== X-CSE-MsgGUID: UbrHLIkcTLaQQawddVTH5g== X-IronPort-AV: E=McAfee;i="6600,9927,11034"; a="7710797" X-IronPort-AV: E=Sophos;i="6.07,180,1708416000"; d="scan'208";a="7710797" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Apr 2024 14:34:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,11034"; a="827790609" X-IronPort-AV: E=Sophos;i="6.07,180,1708416000"; d="scan'208";a="827790609" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga001.jf.intel.com with SMTP; 04 Apr 2024 14:34:55 -0700 Received: by stinkbox (sSMTP sendmail emulation); Fri, 05 Apr 2024 00:34:54 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Vidya Srinivas , Arun R Murthy Subject: [PATCH v2 04/17] drm/i915: Disable live M/N updates when using bigjoiner Date: Fri, 5 Apr 2024 00:34:28 +0300 Message-ID: <20240404213441.17637-5-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240404213441.17637-1-ville.syrjala@linux.intel.com> References: <20240404213441.17637-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä All joined pipes share the same transcoder/timing generator. Currently we just do the commits per-pipe, which doesn't really work if we need to change the timings at the same time. For now just disable live M/N updates when bigjoiner is needed. Tested-by: Vidya Srinivas Reviewed-by: Arun R Murthy Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dp.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 8b67cd62f188..4552005caae2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2752,7 +2752,11 @@ intel_dp_drrs_compute_config(struct intel_connector *connector, intel_panel_downclock_mode(connector, &pipe_config->hw.adjusted_mode); int pixel_clock; - if (has_seamless_m_n(connector)) + /* + * FIXME all joined pipes share the same transcoder. + * Need to account for that when updating M/N live. + */ + if (has_seamless_m_n(connector) && !pipe_config->bigjoiner_pipes) pipe_config->update_m_n = true; if (!can_enable_drrs(connector, pipe_config, downclock_mode)) {