[15/35] drm/i915/bios: Define VBT block 15 (Dot Clock Override Table) contents

Commit Message

Ville Syrjala May 3, 2024, 12:24 p.m. UTC

From: Ville Syrjälä <[e-mail]>

Define the contents of VBT block 15 (Dot Clock Override Table)

The contents were reverse engineered by intuition. The gen2 stuff
seems solid as I can verify that against real world VBT data. The
gen3 stuff less so as all the gen3+ VBTs I have just filla the
entire block with zeroes.

Signed-off-by: Ville Syrjälä <[e-mail]>
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 30 +++++++++++++++++++
 1 file changed, 30 insertions(+)

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 2075d53ca317..c2f73c7d9412 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -797,6 +797,36 @@  struct bdb_driver_persistence {
 	u8 persistent_max_config;
 } __packed;
 
+/*
+ * Block 15 - Dot Clock Override Table
+ */
+
+struct dot_clock_override_entry_gen2 {
+	u32 dotclock;
+	u8 n;
+	u8 m1;
+	u8 m2;
+	u8 p1:5;
+	u8 p1_div_by_2:1;
+	u8 reserved:1;
+	u8 p2_div_by_4:1;
+} __packed;
+
+struct dot_clock_override_entry_gen3 {
+	u32 dotclock;
+	u8 n;
+	u8 m1;
+	u8 m2;
+	u8 p1;
+	u8 p2;
+} __packed;
+
+struct bdb_dot_clock_override {
+	u8 row_size; /* 8 == gen2, 9 == gen3+ */
+	u8 num_rows;
+	struct dot_clock_override_entry_gen3 table[]; /* or _gen2 */
+} __packed;
+
 /*
  * Block 22 - SDVO LVDS General Options
  */