@@ -1773,6 +1773,8 @@ struct intel_dp {
u32 aux_busy_last_status;
u8 train_set[4];
+ struct delayed_work check_link_work;
+
struct intel_pps pps;
bool is_mst;
@@ -75,6 +75,7 @@
#include "intel_hotplug_irq.h"
#include "intel_lspcon.h"
#include "intel_lvds.h"
+#include "intel_modeset_lock.h"
#include "intel_panel.h"
#include "intel_pch_display.h"
#include "intel_pps.h"
@@ -5230,6 +5231,26 @@ int intel_dp_retrain_link(struct intel_encoder *encoder,
return 0;
}
+static void intel_dp_link_check_work_fn(struct work_struct *work)
+{
+ struct intel_dp *intel_dp =
+ container_of(work, typeof(*intel_dp), check_link_work.work);
+ struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+ struct drm_modeset_acquire_ctx ctx;
+ int ret;
+
+ intel_modeset_lock_ctx_retry(&ctx, NULL, 0, ret)
+ ret = intel_dp_retrain_link(encoder, &ctx);
+}
+
+void intel_dp_queue_link_check(struct intel_dp *intel_dp, int delay_ms)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+ mod_delayed_work(i915->unordered_wq,
+ &intel_dp->check_link_work, msecs_to_jiffies(delay_ms));
+}
+
static int intel_dp_prep_phy_test(struct intel_dp *intel_dp,
struct drm_modeset_acquire_ctx *ctx,
u8 *pipe_mask)
@@ -6000,6 +6021,8 @@ void intel_dp_encoder_flush_work(struct drm_encoder *encoder)
struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
struct intel_dp *intel_dp = &dig_port->dp;
+ cancel_delayed_work_sync(&intel_dp->check_link_work);
+
intel_dp_mst_encoder_cleanup(dig_port);
intel_dp_tunnel_destroy(intel_dp);
@@ -6609,6 +6632,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
/* Initialize the work for modeset in case of link train failure */
intel_dp_init_modeset_retry_work(intel_connector);
+ INIT_DELAYED_WORK(&intel_dp->check_link_work, intel_dp_link_check_work_fn);
if (drm_WARN(dev, dig_port->max_lanes < 1,
"Not enough lanes (%d) for DP on [ENCODER:%d:%s]\n",
@@ -60,6 +60,7 @@ int intel_dp_get_active_pipes(struct intel_dp *intel_dp,
u8 *pipe_mask);
int intel_dp_retrain_link(struct intel_encoder *encoder,
struct drm_modeset_acquire_ctx *ctx);
+void intel_dp_queue_link_check(struct intel_dp *intel_dp, int delay_ms);
void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
@@ -1483,6 +1483,11 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
else
passed = intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count);
+ if (passed) {
+ intel_dp_queue_link_check(intel_dp, 2000);
+ return;
+ }
+
/*
* Ignore the link failure in CI
*
@@ -1495,13 +1500,12 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
* For test cases which rely on the link training or processing of HPDs
* ignore_long_hpd flag can unset from the testcase.
*/
- if (!passed && i915->display.hotplug.ignore_long_hpd) {
+ if (i915->display.hotplug.ignore_long_hpd) {
lt_dbg(intel_dp, DP_PHY_DPRX, "Ignore the link failure\n");
return;
}
- if (!passed)
- intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
+ intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
}
void intel_dp_128b132b_sdp_crc16(struct intel_dp *intel_dp,
Recheck the link state after a passing link training, with a 2 sec delay to account for cases where the link goes bad following the link training and the sink doesn't report this via an HPD IRQ. The delayed work added here will be also used by a later patch after a failed link training to try to retrain the link with unchanged link params before reducing the link params. Signed-off-by: Imre Deak <imre.deak@intel.com> --- .../drm/i915/display/intel_display_types.h | 2 ++ drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 1 + .../drm/i915/display/intel_dp_link_training.c | 10 +++++--- 4 files changed, 34 insertions(+), 3 deletions(-)