diff mbox series

[3/8] drm/i915/psr: Get Early Transport status in intel_psr_pipe_get_config

Message ID 20240515100411.691203-4-jouni.hogander@intel.com (mailing list archive)
State New, archived
Headers show
Series Panel Replay Fixes | expand

Commit Message

Hogander, Jouni May 15, 2024, 10:04 a.m. UTC 
We are currently not getting Early Transport status information in
intel_psr_pipe_get_config. Fix this.

Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 79f81524119b..71fa3dfd5b71 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1760,6 +1760,8 @@  void intel_psr_get_config(struct intel_encoder *encoder,
 			pipe_config->enable_psr2_sel_fetch = true;
 	}
 
+	pipe_config->enable_psr2_su_region_et = intel_dp->psr.su_region_et_enabled;
+
 	if (DISPLAY_VER(dev_priv) >= 12) {
 		val = intel_de_read(dev_priv,
 				    TRANS_EXITLINE(dev_priv, cpu_transcoder));