@@ -1765,6 +1765,8 @@ struct intel_dp {
int max_lane_count;
/* Max rate for the current link */
int max_rate;
+ /* Sequential link training failures after a passing LT */
+ int seq_train_failures;
} link;
bool reset_link_params;
int mso_link_count;
@@ -2950,6 +2950,7 @@ static void intel_dp_reset_link_params(struct intel_dp *intel_dp)
{
intel_dp->link.max_lane_count = intel_dp_max_common_lane_count(intel_dp);
intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
+ intel_dp->link.seq_train_failures = 0;
}
/* Enable backlight PWM and backlight PP control. */
@@ -5056,6 +5057,9 @@ intel_dp_needs_link_retrain(struct intel_dp *intel_dp)
intel_dp->lane_count))
return false;
+ if (intel_dp->link.seq_train_failures)
+ return true;
+
/* Retrain if link not ok */
return !intel_dp_link_ok(intel_dp, link_status);
}
@@ -1486,10 +1486,13 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
passed = intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count);
if (passed) {
+ intel_dp->link.seq_train_failures = 0;
intel_ddi_queue_link_check(dig_port, 2000);
return;
}
+ intel_dp->link.seq_train_failures++;
+
/*
* Ignore the link failure in CI
*
@@ -1507,6 +1510,11 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
return;
}
+ if (intel_dp->link.seq_train_failures < 2) {
+ intel_ddi_queue_link_check(dig_port, 0);
+ return;
+ }
+
intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
}
Try to maintain the current link parameters by retrying the link training with unchanged link parameters before reducing these parameters (sending an uevent to userspace to retrain the link instead). Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/display/intel_display_types.h | 2 ++ drivers/gpu/drm/i915/display/intel_dp.c | 4 ++++ drivers/gpu/drm/i915/display/intel_dp_link_training.c | 8 ++++++++ 3 files changed, 14 insertions(+)