Message ID | 20240528185647.7765-7-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915: Cleanups around scanline arithmetic | expand |
On Tue, 28 May 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Dotclocks can reach ~1GHz these days, so intel_usecs_to_scanlines(), > with its 32bit maths, is currently limited to a few milliseconds. > I want bigger numbers in DSB selftests, so switch over to 64bit > maths. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_crtc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c > index ca6dc1dc56c8..17edd6099287 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc.c > +++ b/drivers/gpu/drm/i915/display/intel_crtc.c > @@ -454,8 +454,8 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, > if (!adjusted_mode->crtc_htotal) > return 1; > > - return DIV_ROUND_UP(usecs * adjusted_mode->crtc_clock, > - 1000 * adjusted_mode->crtc_htotal); > + return DIV_ROUND_UP_ULL(mul_u32_u32(usecs, adjusted_mode->crtc_clock), > + 1000 * adjusted_mode->crtc_htotal); > } > > /**
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c index ca6dc1dc56c8..17edd6099287 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.c +++ b/drivers/gpu/drm/i915/display/intel_crtc.c @@ -454,8 +454,8 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, if (!adjusted_mode->crtc_htotal) return 1; - return DIV_ROUND_UP(usecs * adjusted_mode->crtc_clock, - 1000 * adjusted_mode->crtc_htotal); + return DIV_ROUND_UP_ULL(mul_u32_u32(usecs, adjusted_mode->crtc_clock), + 1000 * adjusted_mode->crtc_htotal); } /**